參數(shù)資料
型號: BUS-65164-180K
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70
封裝: 1.900 X 1 INCH, 0.215 INCH HEIGHT, FP-70
文件頁數(shù): 11/40頁
文件大小: 349K
代理商: BUS-65164-180K
19
STATUS
MID-SYNC
MID-PARITY
DATA
MID-PARITY
t14
DATA
MID-PARITY
STATUS
CWC=1
t12
t16
CWC=2
t17
t18
t15
t13
t9
t13
Notes:
1)IF ADDR_ENA IS LOGIC “1”, CS, WRT, AND A13..A0 WILL BE IN A HIGH IMPEDANCE STATE EXCEPT FOR WHEN A WORD TRANSFER IS BEING PERFORMED
(DT_ACK = LOGIC “0”).
2)THE LEADING EDGE OF TIME REFERENCE t9 AND THE TRAILING EDGE OF TIME REFERENCES t6 AND t13 ARE DEFINED AS THE FALLING EDGE OF
DT_REQ.
3)THE TRAILING EDGE OF REFERENCE t9 AND THE LEADING EDGE OF TIME REFERENCE t12 ARE DEFINED AS THE RISING EDGE OF DT_REQ.
4)DATA TRANSFER CYCLE TIMING INFORMATION IS DESCRIBED IN OTHER FIGURES.
MIN
MAX
1.23
60
1.57
1.52
6.18
SYMBOL
DESCRIPTION
TYP
UNITS
t12
t13(@16MHz)
END OF DATA TRANSFER CYLE TO VALID NEXT WC (Note 3)
MID-PARITY CROSSING OF RECEIVED DATA WORD TO START OF DATA TRANSFER CYCLE (Note 2)
ns
s
t13(@12MHz)
t14(@12MHz)
MID-PARITY CROSSING OF RECEIVED DATA WORD TO START OF DATA TRANSFER CYCLE (Note 2)
RT RESPONSE TIME
s
t14(@16MHz)
RT RESPONSE TIME
s
t15
MID-SYNC CROSSING OF STATUS RESPONSE TO RTFAIL RISING
ns
t16(@12MHz)
MID-PARITY CROSSING OF STATUS RESPONSE TO INCMD RISING
s
t16(@16MHz)
MID-PARITY CROSSING OF STATUS RESPONSE TO INCMD RISING
s
t17(@12MHz)
MID-PARITY CROSSING OF STATUS RESPONSE TO GBR FALLING
s
t17(@16MHz)
MID-PARITY CROSSING OF STATUS RESPONSE TO GBR FALLING
s
18(@12MHz)
GBR PULSE WIDTH
ns
t18(@16MHz)
GBR PULSE WIDTH
ns
1.94
6.96
6.0
6.76
100
3.36
3.57
3.26
3.45
3.23
3.37
3.17
3.29
140
190
100
150
FIGURE 7. RT TO RT (RECEIVE) TIMING (CONTINUED)
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