參數(shù)資料
型號: BT865AKPF
英文描述: Color Encoder Circuit
中文描述: 顏色編碼器電路
文件頁數(shù): 60/76頁
文件大?。?/td> 1050K
代理商: BT865AKPF
3.0 PC Board Considerations
Bt864A/865A
3.3 Decoupling
YCrCb to NTSC/PAL Digital Video Encoder
3-4
Conexant
100138B
3.3 Decoupling
3.3.1 Device Decoupling
For optimum performance, all capacitors should be located as close as possible to
the device, and the shortest possible leads (consistent with reliable operation)
should be used to reduce the lead inductance. Chip capacitors are recommended
for minimum lead inductance. Radial lead ceramic capacitors may be substituted
for chip capacitors and are better than axial lead capacitors for self-resonance.
Values are chosen to have self-resonance above the pixel clock.
3.3.2 Power Supply Decoupling
The best power supply performance is obtained with a 0.1
μ
F ceramic capacitor
decoupling each group of VDD pins to GND, and the VAA pin to AGND. The
capacitors should be placed as close as possible to the device VAA, VDD, AGND,
and GND pins and connected with short, wide traces.
The 47
μ
F capacitor shown in
Figure 3-2
is for low-frequency power supply
ripple; the 0.1
μ
F capacitors are for high-frequency power supply noise rejection.
When a linear regulator is used, the power-up sequence must be verified to
prevent latchup. A linear regulator is recommended to filter the analog power
supply if the power supply noise is greater than or equal to 200 mV This is
especially important when a switching power supply is used, and the switching
frequency is close to the raster scan frequency. About 5% of the power supply
hum and ripple noise less than 1 MHz will couple onto the analog outputs.
3.3.3 COMP Decoupling
The COMP pin must be decoupled to the VAA pin, typically with a 0.1
μ
F
ceramic capacitor. Low-frequency supply noise will require a larger value. The
COMP capacitor must be as close as possible to the COMP and the VAA pin. A
surface-mount ceramic chip capacitor is preferred for minimal lead inductance.
Lead inductance degrades the noise rejection of the circuit. Short, wide traces will
also reduce lead inductance.
3.3.4 VREF Decoupling
A 0.1
μ
F ceramic capacitor should be used to decouple this pin to AGND.
3.3.5 VBIAS Decoupling
A 0.1
μ
F ceramic capacitor should be used to decouple this pin to AGND.
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