參數(shù)資料
型號: BT865AKPF
英文描述: Color Encoder Circuit
中文描述: 顏色編碼器電路
文件頁數(shù): 51/76頁
文件大?。?/td> 1050K
代理商: BT865AKPF
100138B
Conexant
2-1
2
2.0 Internal Registers
A read-back bit map is given in
Table 2-1
, and a register bit map is given in
Table 2-2
. Bit descriptions and
detailed programming information follow the bit map. All registers are write-only and are set to zero following
a software reset. A software reset is always performed at power-up; after power-up, a reset can be triggered by
writing the SRESET register bit.
Figure 3-5
illustrates timing required for I
2
C communications.
2.1 Essential Registers
The power-up state is defined to be black burst CCIR601 NTSC video. To enable active video, the EACTIVE
register bit must be set.
2.2 Important Registers
The default video format is interlaced 8-bit CCIR601 NTSC. Other video formats can be enabled only by
programming the four following registers: 0x53, 00x65, 0x66, and 0x67. Other registers may need to be
programmed to get the desired timing of the synchronization pins; these include HSYNCF[9:0] and
HSYNCR[9:0].
Table 2-1. Read-back Bit Map
ESTATUS
7
6
5
4
3
2
1
0
0
ID[2:0]
VERSION[4:0]
1
ID[2:0]
CCSTAT[2]
CCSTAT[1]
FIELD[2:0]
NOTE(S):
The ID[2:0] bits indicate the part number: 4 is returned from the Bt864A; 5 is returned from the Bt865A. The version
number is indicated by bits VERSION[4:0]. For this revision, VERSION[4:0] = 0x11. The CCSTAT[2] bit is high if closed-caption
data has been written for the even field; it is low immediately after the clock run-in on line 284 or 335. The CCSTAT[1] bit is high
if closed-caption data has been written for the odd field; it is low immediately after the clock run-in on line 21 or 22. The
FIELD[2:0] bits represent the field number, where 000 indicates the first field.
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