參數(shù)資料
型號： BT865AKPF
英文描述： Color Encoder Circuit
中文描述： 顏色編碼器電路
文件頁數(shù)： 12/76頁
文件大?。?/td> 1050K
代理商： BT865AKPF
Composite video or Green (with blanking and sync, and optionally, Macrovision
encoding).
1.0 Circuit Description
Bt864A/865A
1.1 Pin Descriptions
YCrCb to NTSC/PAL Digital Video Encoder
1-2
Conexant
100138B
SLAVE
I
42
Slave/master mode select input (TTL compatible). A logical one configures the
device for slave video timing operation. A logical zero configures the device for
master video timing operation. This pin may be connected directly to VDD or
GND.
RGBOUT
I
14
Analog RGB control input (TTL compatible). A logical one configures the device
to output analog RGB (RGBOUT mode) and one composite video output. A
logical zero configures the device to generate S-video along with two composite
video outputs. This pin may be connected directly to VDD or GND.
FIELD
O
15
Field control output (TTL compatible). FIELD transitions after the rising edge of
CLK, two clock cycles following falling HSYNC*. It is a logical zero during FIELD
1 and is a logical one during FIELD 2.
SLEEP
I
39
Power-down control input (TTL compatible). A logical one configures the device
for power-down mode. A logical zero configures the device for normal
operation. This pin may be connected directly to VDD or GND.
SDA
I/O
40
Serial interface data input/output (TTL compatible). Data is written to and read
from the device via this serial bus.
SCL
I
41
Serial interface clock input (TTL compatible). The maximum clock rate is
100 kHz.
VDD3V
I
44
Input threshold adjustment. When low, indicates nominal supply voltage of
5 volts. When high, indicates nominal supply voltage of 3.3 volts.
CVBS/B
O
8
Composite video or Blue (with blanking and sync, and optionally, Macrovision
encoding). Optional luma delay channel for composite video output.
AGND (CVBS/B)
6
Analog ground for pin CVBS/B.
CVBS/G
O
10
AGND (CVBS/G)
7
Analog ground for pin CVBS/G.
C/R
O
12
Modulated chrominance, or Red.
AGND (C/R)
9
Analog ground for pin C/R.
Y/CVBS
O
13
Luminance or composite video (with blanking, sync, and optionally,
Macrovision encoding, and/or closed-captioning encoding).
AGND (Y/CVBS)
11
Analog ground for pin Y/CVBS.
FSADJUST
I
1
Full-scale adjust control pin. A resistor (RSET) connected between this pin and
GND controls the full-scale output current on the analog outputs. For standard
operation, use the nominal RSET values shown under Recommended Operating
Conditions.
VBIAS
O
2
DAC bias voltage. A 0.1 μF ceramic capacitor must be used to decouple this pin
to GND. The capacitor must be as close to the device as possible to keep lead
lengths to an absolute minimum.
VREF
O
3
Voltage reference pin. A 0.1 μF ceramic capacitor must be used to decouple this
pin to GND. The capacitor must be as close to the device as possible to keep
lead lengths to an absolute minimum.
Table 1-1. Pin Assignments
(2 of 3)
Pin Name
I/O
Pin #
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
BT865AKRF 制造商:CONEXANT 制造商全稱:CONEXANT 功能描述:YCrCb to NTSC/PAL Digital Video Encoder
BT866KPF 制造商:Brooktree 功能描述:Video/TV Circuit, Color Encoder Circuit, 52 Pin, Plastic, QFP
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BT867KPF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit
BT867KPJ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit
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