參數(shù)資料
型號： AV80C51T-12R
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44
文件頁數(shù)： 6/170頁
文件大?。?/td> 4133K
代理商： AV80C51T-12R
103
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
14.5.8
SKEY - Serial KEY signaling
The SKEY instruction is used to signal the activation key that enables NVM programming. The SKEY instruction is
followed by the 8 data bytes that includes the activation key, as shown in Table 14-9.
14.6
Accessing the Non-Volatile Memory Controller
By default, NVM programming is not enabled. In order to access the NVM Controller and be able to program the
non-volatile memories, a unique key must be sent using the SKEY instruction. The 64-bit key that will enable NVM
programming is given in Table 14-10.
After the key has been given, the Non-Volatile Memory Enable (NVMEN) bit in the TPI Status Register (TPISR)
must be polled until the Non-Volatile memory has been enabled.
NVM programming is disabled by writing a logical zero to the NVMEN bit in TPISR.
14.7
Control and Status Space Register Descriptions
The control and status registers of the Tiny Programming Interface are mapped in the Control and Status Space
(CSS) of the interface. These registers are not part of the I/O register map and are accessible via SLDCS and
SSTCS instructions, only. The control and status registers are directly involved in configuration and status monitor-
ing of the TPI.
A summary of CSS registers is shown in Table 14-11.
Table 14-9.
The Serial KEY signaling (SKEY) Instruction
Operation
Opcode
Remarks
Key
{8[data}}
1110 0000
Data bytes follow after instruction
Table 14-10. Enable Key for Non-Volatile Memory Programming
Key
Value
NVM Program Enable
0x1289AB45CDD888FF
Table 14-11. Summary of Control and Status Registers
Addr.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x0F
TPIIR
Tiny Programming Interface Identification Code
0x0E
...
0x03
Reserved
–
0x02
TPIPCR
–
GT2
GT1
GT0
0x01
Reserved
–
0x00
TPISR
–
NVMEN
–
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PDF描述
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