參數(shù)資料
型號: ATTINY43U-SUR
廠商: Atmel
文件頁數(shù): 87/158頁
文件大?。?/td> 0K
描述: MCU AVR 4KB FLASH 8MHZ 20SOIC
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 1,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY43U-SUR-ND
34
8048C–AVR–02/12
ATtiny43U
Bits 4:3 – SM[1:0]: Sleep Mode Select Bits 1 and 0
These bits select between the three available sleep modes as shown in Table 7-2 below.
Bit 2 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD disable
is controlled by a timed sequence.
7.5.2
PRR – Power Reduction Register
Bits 7:5 – PRE[2:0]: Prepared Read Enable
These bits are used for prepared read operations. See sections “Software Control of Boost Con-
Bit 4 – Res: Reserved Bit
This bit is reserved and will always read zero.
Bit 3 – PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
Bit 2 – PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
Bit 1 – PRUSI: Power Reduction USI
Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When
waking up the USI again, the USI should be re-initialized to ensure proper operation.
Bit 0 – PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
Table 7-2.
Sleep Mode Select
SM1
SM0
Sleep Mode
00
Idle
0
1
ADC Noise Reduction
1
0
Power-down
11
Reserved
Bit
7
654
3
2
10
PRE2
PRE1
PRE0
PRTIM1
PRTIM0
PRUSI
PRADC
PRR
Read/Write
R
R/W
Initial Value
0
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