參數(shù)資料
型號: ATTINY43U-SUR
廠商: Atmel
文件頁數(shù): 103/158頁
文件大?。?/td> 0K
描述: MCU AVR 4KB FLASH 8MHZ 20SOIC
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 1,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY43U-SUR-ND
49
8048C–AVR–02/12
ATtiny43U
9.
System Control and Reset
9.1
Resetting the AVR
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a RJMP – Relative
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. The circuit diagram in Figure 9-1 shows the reset logic. Table 20-4 on page 161
defines the electrical parameters of the reset circuitry.
Figure 9-1.
Reset Logic
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in “Clock Sources” on page 24.
MCU Status
Register (MCUSR)
Brown-out
Reset Circuit
BODLEVEL[2:0]
Delay Counters
CKSEL[1:0]
CK
TIMEOUT
WDRF
BORF
EX
TRF
PORF
DATA BUS
Clock
Generator
SPIKE
FILTER
Pull-up Resistor
Watchdog
Oscillator
SUT[1:0]
Power-on Reset
Circuit
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