參數(shù)資料
型號(hào)： ATAM893T-TKSYD
廠商： Atmel
文件頁(yè)數(shù)： 58/98頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH 4K MTP 20SSOP
標(biāo)準(zhǔn)包裝： 830
系列： MARC4
核心處理器： MARC4
芯體尺寸： 4-位
速度： 4MHz
連通性： SSI（2 線，3 線）
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 16
程序存儲(chǔ)器容量： 4KB（4K x 8）
程序存儲(chǔ)器類型： EEPROM
EEPROM 大?。?/td> 64 x 16
RAM 容量： 256 x 4
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 6.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 20-SOIC（0.209"，5.30mm 寬）
包裝： 管件
61
4680C–4BMCU–01/05
ATAM893-D
5.3.4.2
SSI Peripheral Configuration
The synchronous serial interface (SSI) can be used either for serial communication with external
devices such as Proems, shift registers, display drivers, other microcontrollers, or as a means
for generating and capturing on-chip serial streams of data. External data communication takes
place via the Port 4 (BP4), a multi-functional port which can be software configured by writing
the appropriate control word into the P4CR register. The SSI can be configured in any of the fol-
lowing ways:
1.
2-wire external interface for bi-directional data communication with one data terminal
and one shift clock. The SSI uses the Port BP43 as a bi-directional serial data line (SD)
and BP40 as shift clock line (SC).
2.
3-wire external interface for simultaneous input and output of serial data, with a serial
input data terminal (SI), a serial output data terminal (SO) and a shift clock (SC). The
SSI uses BP40 as shift clock (SC), while the serial data input (SI) is applied to BP43
(configured in P4CR as input!). Serial output data (SO) in this case is passed through to
BP42 (configured in P4CR to T2O) via the Timer 2 output stage (T2M2 configured in
mode 6).
3.
Timer/SSI combined modes - the SSI used together with Timer 2 or Timer 3 is capable
of performing a variety of data modulation and demodulation functions (see Timer Sec-
tion). The modulating data is converted by the SSI into a continuous serial stream of
data which is in turn modulated in one of the timer functional blocks. Serial demodu-
lated data can be serially captured in the SSI and read by the controller. In the Timer 3
modes 10 and 11 (demodulation modes) the SSI can only be used as demodulator.
4.
Multi-chip link (MCL) – the SSI can also be used as an microchip data interface for use
in single package multi-chip modules or hybrids. For such applications, the SSI is pro-
vided with two dedicated pads (MCL_SD and MCL_SC) which act as a two-wire chip-
to-chip link. The MCL can be activated by the MCL control bit. Should these MCL pads
be used by the SSI, the standard SD and SC pins are not required and the correspond-
ing Port 4 ports are available as conventional data ports.
Figure 5-38. Block Diagram of the Synchronous Serial Interface
8-bit Shift Register
MSB
LSB
Shift_CL
SO
SIC1
SIC2
SISC
SC
Control
STB
SRB
SI
Timer 2/Timer 3
Output
INT3
SC
I/O-bus
SSI-Control
TOG2
POUT
T1OUT
SYSCL
SO
SI
MCL_SC
SD
MCL_SD
Transmit
Buffer
Receive
Buffer
SCI
/2
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