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參數(shù)資料
| 型號： | AT42QT1060-MMU |
| 廠商： | ATMEL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC28 |
| 封裝： | 4 X 4 MM, 1MM HEIGHT, 0.45 MM PITCH, ROHS COMPLIANT, MLF-28 |
| 文件頁數(shù)： | 6/32頁 |
| 文件大?。?/td> | 389K |
| 代理商： | AT42QT1060-MMU |
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14
9505E–AT42–02/09
AT42QT1060
5.
I2C-compatible Communications
5.1
I2C-compatible Protocol
5.1.1
Protocol
page 17) and supports multibyte reads and writes. The maximum clock rate is 100 kHz.
5.1.2
Signals
The I
2C-compatible interface requires two signals to operate:
SDA - Serial Data
SCL - Serial Clock
A third line, CHG, is used to signal when the device has seen a change in the status byte:
CHG: Open-drain, active low when any capacitive key in the key mask has changed state or
any input line has changed state since the last I2C-compatible read. After reading the two
status bytes, this pin floats (high) again if it is pulled up with an external resistor. If the status
bytes change back to their original state before the host has read the status bytes (for
example, a touch followed by a release), the CHG line will be held low. In this case, a read to
any memory location will clear the CHG line.
5.1.3
Clock Stretching
The device has an internal monitor that resets its I
2 C-compatible hardware if either
I
2C-compatible line is held low, without the other line changing, for more than about 14 ms. It is
important that no other device on the bus clock stretches for 14 ms, otherwise the monitor will
reset the I
2C-compatible hardware and transfers with the chip may be corrupted.
If the device is configured to run in stand-alone mode, the monitor will be turned off.
5.2
I2C-compatible Address
There is one preset I2C-compatible address of 0x12. This is not changeable.
5.3
Data Read/Write
5.3.1
Writing Data to the Device
The sequence of events required to write data to the device is shown next.
Table 5-1.
Description of Write Data Bits
Key
Description
S
Start condition
SLA+W
Slave address plus write bit
A
Acknowledge bit
SLA+W
MemAddress
AA
S
Data
A
P
Host to Device
Device to Host
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