參數(shù)資料
型號(hào): ASCELL3912
廠(chǎng)商: AUSTRIAMICROSYSTEMS AG
元件分類(lèi): 通信及網(wǎng)絡(luò)
英文描述: ER 10C 10#16 SKT RECP LINE
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO20
封裝: TSSOP-20
文件頁(yè)數(shù): 4/14頁(yè)
文件大?。?/td> 122K
代理商: ASCELL3912
ISM 868 MHz, 433 MHz and 315 MHz FSK Receiver Cell – Preliminary Data Sheet
ASCell3912
Rev. A, February 2000
Page 4 of 14
Austria Mikro Systeme International AG
1.1
The input signal is a low to moderately high modulation index continuous phase frequency shift
keying modulated RF signal around a carrier Fc. This signal is amplified by the low noise ampli-
fier (LNA) and fed to the In-phase and Quadrature-phase mixers (I/Q mixers). The mixers con-
vert the RF signal directly to base band. The local oscillator signal for the I/Q mixers is generated
by the on-chip PLL.
The two base band signals (signals I and Q) are filtered and further amplified. After DC offset
cancellation to remove the static and quasi-static DC offsets and to ensure fast wake-up of the
receiver, the signals are hard limited. The rectangular signals I’ and Q’ are fed to the digital part
where demodulation and the further signal processing is applied.
Analog Receiver Part
1.1.1 RF Synthesizer
Frequency synthesis is performed by a conventional synthesizer consisting of a phase detector,
a charge pump, a voltage controlled oscillator working at 315~868.3 MHz, and a feedback divider
by 16 (315.00MHz); 32 (315, 433.92MHz), or 64 (868.3MHz). A truth table for the different fre-
quencies is given in Table 1.
F
XOSC
/ MHz
Multiplier
F
C
/ MHz
FB1
FB0
RF-SEL
XO-SEL
19,6875
16
315.000
H
L
L
L
13.5600
32
433.920
L
H
L
H
13.5672
64
868.300
L
L
H
H
Table 1:
Quartz and RF output frequencies.
Note: XO-SEL and RF-SEL are intenal generated Signals from the FB[1:0] bits of the setup information.
1.1.2
LNA
The amplification of the LNA can be switched in two states. The gain can be switched of about
10dB with the LNA bit of the setup command.
Note: LNA is one bit of the setup information.
1.1.3 I/Q Down Converter
The ASCell3912 contains a high performance quadrature down converter with low DC offset and
high isolation of RF- and LO-ports.
1.1.4
Base Band Filter
To achieve optimum blocking performance, the base band filter is realized in two separated cir-
cuit blocks. The first filter block removes high level blocking signals out of receive band, the sec-
ond filter block serves for high selectivity of adjacent interferers.
1.1.5 DC-Cancellation and Adjustment of Lower Cut-Off Frequency
The DC offset is removed by a first order high-pass with switchable limit frequency. In the first
step the frequency offset of transmitter and receiver is not compensated, therefore the lower
band limit is about 10 kHz. In the second step, the receiver frequency is adjusted and the lower
limit frequency of the DC-block is set to about 40 kHz and therefore the total bandwidth of pass
band is reduced. At the output of the DC block is a switch to initialize the DC-offset in the power-
up instant, at the instant of switching, and after appearance of high level interfering signals.
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