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參數(shù)資料
| 型號： | AS8201 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | TTP/C-C1 Communications Controller |
| 中文描述： | 2 CHANNEL(S), 2M bps, SERIAL COMM CONTROLLER, PQFP120 |
| 封裝： | PLASTIC, QFP-120 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 247K |
| 代理商： | AS8201 |
TTP/C-C1 Communications Controller Data Sheet
AS8201
Rev. NC, October 1999
Page 4 of 13
Austria Mikro Systeme International AG
Pin Description
PinNr. Pin Name
1
VDD
2
VSS
3-18
RAM_DATA[0:15]
19
VDD
20
VSS
21
RAM_OEB
22
RAM_WEB
23
RAM_READYB
24
TIME_OVERFLOW
25
TIME_SIGNAL
26
TIME_TICK
27
MICROTICK
28
XENA0
29
VDD
30
VSS
31
XIN0
Dir Description
P
positive power supply
P
negative power supply
I/O DPRAM data bus, tristate
P
positive power supply
P
negative power supply
I
DPRAM output enable, active low
I
DPRAM write enable, active low
O
DPRAM ready, active low, indicates read/write operation finished
O
CNI control signal, overflow of global time
O
CNI control signal, CNI time signal
O
CNI clock signal, macrotick, typically about 1us at 20 MHz clock.
O
output of main clock, inverted to signal applied at pin XOUT0.
I
oscillator 0 (main clock) enable, active low.
P
positive power supply
P
negative power supply
A
analog pad from oscillator / use as input when providing external
clock
A
analog pad from oscillator / leave open when providing external
clock
P
positive power supply
P
negative power supply
I
channel [0]: transmitter output enable
I
PU
channel [0]: receiver input
O
channel [0]: transmit data
O
channel [0]: transmitter clear to send
O
channel [0]: bus driver enable
I
(1) main reset input signal, active low. When connected the in-
ternal power-on reset function is overridden
(2) if unconnected: an internal reset is generated after power-on.
Reset pulse duration typically 24 us.
I
PD
test input: scan enable, active high
I
PD
test input: functional test mode, active high
I
PD
test input: instruction insertion enable, active high
O
test outputs:
(1) in production test used as scan chain outputs
(2) in operation: can be used as generic output port, e.g. to drive
LEDs
I
channel [1]: transmitter output enable
I
PU
channel [1]: receiver input
O
channel [1]: transmit data
O
channel [1]: transmitter clear to send
O
channel [1]: bus driver enable
I
oscillator 1 (bus guardian) enable, active low.
P
positive power supply
P
negative power supply
A
analog pad from oscillator / use as input when providing external
clock
A
analog pad from oscillator / leave open when providing external
clock
P
positive power supply
P
negative power supply
32
XOUT0
33
34
35
36
37
38
39
40
VSS
VDD
OE[0]
RXD[0]
TXD[0]
CTS[0]
BDE[0]
RESETB
41
42
43
44-50
TEST_SE
FTEST
FTEST_IEN
LED[0:6]
51
52
53
54
55
56
57
58
59
OE[1]
RXD[1]
TXD[1]
CTS[1]
BDE[1]
XENA1
VDD
VSS
XIN1
60
XOUT1
61
62
VSS
VDD
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