參數(shù)資料
型號(hào): AS5130-ASST-500
廠商: ams
文件頁數(shù): 14/33頁
文件大小: 4323K
描述: IC ENCODER ROTORY 8-BIT 16-SSOP
標(biāo)準(zhǔn)包裝: 500
傳感范圍: 32mT ~ 75mT
類型: 線性,旋轉(zhuǎn)編碼器 - 可編程
電源電壓: 4.5 V ~ 5.5 V
電流 - 電源: 24mA
輸出類型: 模擬,比率
特點(diǎn): 可編程
工作溫度: -40°C ~ 125°C
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
www.austriamicrosystems.com/AS5130
Revision 1.12
13 - 41
AS5130
Datasheet - Detailed Description
Figure 10. Ratiometric Analog Output
7.1.5   Analog Sin/Cos Outputs with External Interpolator
By connecting C1 to VDD, the AS5130 provides analog Sine and Cosine outputs (SINP, COSP) of the Hall array front-end for test purposes.
These outputs allow the user to perform the angle calculation by an external ADC + 礐, e.g. to compute the angle with a high resolution. In
addition, the inverted Sinus and Cosine signals (SINN, COSN; see dotted lines) are available for differential signal transmission.
The input resistance of the receiving amplifier or ADC should be greater than 100k? The signal lines should be kept as short as possible, longer
lines should be shielded in order to achieve best noise performance.
The SINN / COSN / SINP / COSP signals are amplitude controlled to ~1.3Vp (differential) by the internal AGC controller. The DC bias voltage is
2.25 V.
If the SINN and COSN outputs cannot be sampled simultaneously, it is recommended to disable the automatic gain control (see Table 9) as the
signal amplitudes may be changing between two readings of the external ADC. This may lead to less accurate results.
VDD
VSS
micro
controller
100n
VSS
+5V
VDD
PWM
AS5130
VDD
VSS
analog
out
Re4k7
Ce1礔
Analog out
PWMout
Angle
360?/DIV>
180?/DIV>
0?/DIV>
0V
5V
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