- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄381308 > AS2702-20T (AUSTRIAMICROSYSTEMS AG) AS-Interface Slave IC PDF資料下載
參數(shù)資料
| 型號： | AS2702-20T |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 其它接口 |
| 英文描述： | AS-Interface Slave IC |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大小： | 119K |
| 代理商： | AS2702-20T |
AS-Interface Slave IC
AS2702 (SAP4.1)
Rev. C, January 2001
Page 7 of 18
with VSIG > 3V, VUOUT may drop as much as 1V below it’s level
in unloaded condition
Electrolythic and rf filter capacitor in parallel
2
I1RP9SRZHUVXSSO\RXWSXW85
The voltage at U5R is derived from the voltage present at UOUT, as long as UOUT is not
switched off due to overload. In the latter case U5R is derived from an alternative voltage out
of the UOUT voltage regulator, which is more or less similar to VUOUT in non switched off
condition of UOUT. As a result VU5R is not affected by overload condition at UOUT and will
remain.
6\PERO
VU5R
IU5R
CU5R
3DUDPHWHU
Power supply output voltage
Load current
Buffer capacitor
PLQ
4.85
PD[
5.15
1
8QLW
V
mA
nF
100
J2VFLOODWRUSLQV26&DQG26&
The only component to be connected to these pins is a quartz crystal with a resonance fre-
quency of 5.333333 MHz (AS-Interface quartz crystal).
6\PERO
CX2
3DUDPHWHU
Stray capacitance
PLQ
PD[
10
8QLW
pF
K'DWDSRUWSLQV''DQGGDWDVWUREHSLQ'67%Q
Basically data port D3
, …, D0 is designed for bidirectional data transfer out of and into the
slave device. Each data port pin is equipped with both a low-side open-drain output stage as
well as an input stage to this purpose.
Depending on the so called IO-configuration code, written into and stored in the slave device,
each data port pin is individually set to behave as
output, or
output / input, or
input.
The timing of the data transfer is presented in fig. 2.
Strobe signal DSTBn flags and governs the data transfer as follows:
ha) data port pin is set ‘output’:
output data become valid upon the HL-edge of the strobe and will remain so until the next
HL-edge, hence during the entire strobe cycle;
hb) data port pin is set ‘output / input’:
output data become valid upon the HL-edge of the strobe and will remain so until it’s LH-
edge; input data to be valid within a specific time window relative to the HL-edge, after
completion of the strobe’s L-phase;
hc) data port pin is set ‘input’:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS29F010-150TC | 5V 128K x 8 CMOS FLASH EEPROM |
| AS29F010-120TC | 5V 128K x 8 CMOS FLASH EEPROM |
| AS29F010-150LC | 5V 128K x 8 CMOS FLASH EEPROM |
| AS29F010-150PC | 5V 128K x 8 CMOS FLASH EEPROM |
| AS29F010 | 5V 128K x 8 CMOS FLASH EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS2702-20-T | 功能描述:異步串行接口 - ASI RoHS:否 制造商:ams |
| AS2702TR-20 | 制造商:ams 功能描述: |
| AS2710U600 Ohm0.5DB | 制造商:Teikoku Tsushin Kogyo 功能描述: |
| AS2710U6001/2DB | 制造商:Teikoku Tsushin Kogyo 功能描述: |
| AS27150FLF | 制造商:TT Electronics / IRC 功能描述:AS27150FLF |
發(fā)布緊急采購，3分鐘左右您將得到回復。