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參數(shù)資料
| 型號： | AS2702-20T |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 其它接口 |
| 英文描述： | AS-Interface Slave IC |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大小： | 119K |
| 代理商： | AS2702-20T |
AS-Interface Slave IC
AS2702 (SAP4.1)
Rev. C, January 2001
Page 5 of 18
Notes:
1
2
3
4
5
50 V during t > 50 μs; repetition rate < 0.5 Hz
Latch-up immunity test. Pls. observe max. power dissipation allowed.
Human body model: R = 1.5 kOhm; C = 100 pF
Machine model; applies only for LTGP-LTGN
260 °C during 10 s (reflow and wave soldering); 360 °C during 3 s for manual solder-
ing. Twofold reflow soldering is acceptable.
Free convection, see fig. 1
No forced cooling. PCB-surface: 21 cm2; still air volume around the device: 10 cm
3
6
7
Fig. 1: Max. acceptable power dissipation relative to ambient temperature
b) Recommended Operating Conditions
6\PERO
VLTGP
3DUDPHWHU
Positive supply voltage / dc
portion
Supply current consumption
Ambient temperature
Quartz frequency
PLQ
17.5
QRP
PD[
8QLW
1RWH
34
V
1
ILTG
OA
FC
6
85
mA
°C
MHz
2
3
4
- 25
25
5.3333
33
Sensitivity against moisture
5
Notes:
1
False-poling protection diode to be inserted between pos. AS-interface bus line and
LTGP-pin. LTGP-pin to be protected furthermore with a voltage clamp between
LTGP and LTGN.
Oscillator on; data transmission stage off; no loads connected
Power dissipation restrictions as per fig. 1 to be observed
ASI Quarz
Level 5 acc. to JEDEC-standard JESD22-A112, Table 1
2
3
4
5
1
0,5
50
100
t/ °C
Pv/ W
1
0,5
50
100
t/ °C
Pv/ W
62,&
62,&
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