參數(shù)資料
型號: AS2702-20T
廠商: AUSTRIAMICROSYSTEMS AG
元件分類: 其它接口
英文描述: AS-Interface Slave IC
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO20
封裝: SOIC-20
文件頁數(shù): 14/18頁
文件大?。?/td> 119K
代理商: AS2702-20T
AS-Interface Slave IC
AS2702 (SAP4.1)
Rev. C, January 2001
Page 14 of 18
If UOUT drops below VCOMOFF = nom. 10V data communication with the AS-interface bus is
aborted by the receiver or transmitter of the slave device. As long as U5R does not drop be-
low 3.75V in this situation, no ‘hard’ reset takes place; however the data communication
watchdog will be triggered (unless disabled) and a ‘soft’ reset will result.
((3520
AS2702 has a 16 x 8 Bits serial interface EEPROM on board to store the slave unit’s address
and set-up data in a non-volatile fashion.
The EEPROM stores the following data:
((3520
$GGUHVV
0, 1
2
3
4
5
6
'DWD
5HOHYDQW1U
RIELWV
5 + 1
3URJUDPPHGE\
1RWH
Slave Address
Settings (EID1)
Settings (IO-Conf.)
Settings (ID)
Settings (EID2)
Settings (Control-
Code)
Master (Initialization)
Master (Initialization)
Slave unit manufacturer
Slave unit manufacturer
Slave unit manufacturer
Slave unit manufacturer
1
4
5
5
5
5
Note
1
6 Bits (A4, …, A0 + Sel-bit) in extended address mode: 62 slaves addressable;
5 Bits (A4, …, A0) in non-extended address mode: 31 slaves addressable
Obviously the capacity of the EEPROM is only partially used.
Reading and writing of the EEPROM is performed bytewise and trough temporary, volatile
registers.
Writing of data from the volatile register into the EEPROM takes about 10 ms per byte,
whereas reading takes less than 1 ms per byte.
Upon RESET the EEPROM info is read into temporary registers, including the slave’s address
which has been written redundantly into EEPROM locations 0 and 1 before.
The temporary registers receiving the address are compared for similarity; in case of non-
similarity – which e.g. may have been caused by a supply voltage dip during address writing –
the slave will flag non-regular operation status / slave address zero.
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