參數(shù)資料
型號： AN2933
英文描述： Understanding the eTPU Channel Hardware
中文描述： 理解硬件頻道的eTPU
文件頁數(shù)： 28/40頁
文件大小： 741K
代理商： AN2933
Understanding the eTPU Channel Hardware, Rev. 0
Using the Channel Hardware
Freescale Semiconductor
28
qualified transition. Subtracting ERTB from ERTA in the service thread will yield the lag time through the
filter. This is a special mode used to check the action of the channel filter. Please see the Reference Manual
for details.
4
Using the Channel Hardware
Because of the complex design of the channel hardware, the engineer may have a choice of several
approaches to meet the requirements of the design. In this section we will try to give some guidance on
how to approach a design problem using the eTPu in the most efficient manner.
The first question that arises is how to divide the task into hardware, eTPU software and host software
partitions. There are two competing demands on the system which must be considered in order to make a
partitioning decision. The suitability of a real time controller system can be measured in timeliness and
flexibility. The engineer chooses an MCU to control a system principally for the flexibility that the
software offers. But software execution has a finite latency which might exceed the timeliness
requirements for some control systems. Timeliness is not the same as speed. If the temperature of a house
drops below the thermostat set point, it makes little difference if the relay closes in 10 milliseconds or 500
milliseconds. The systems engineer needs to place realistic requirements on the performance of a system.
In the eTPU, one engine is servicing as many as 32 channels. In most applications, the servicing of a
channel event takes less than one microsecond, and events may be milliseconds apart. The worst case
loading on the eTPU engine in a Reference Design was found to be less than 10% under the worst
conditions. However, a too complex algorithm in the service routine for one channel can dominate the
engine and rob performance from the other channels. This is the best argument for migrating as much as
possible of the control algorithm to the host software.
Partitioning between the channel hardware and eTPU software is not as clear. Moving as much as possible
to the hardware will reduce the load and latency on the eTPU engine, but the hardware is the least flexible
of all the subsystems. For example, an input function measuring the width of a pulse might hang up a
system when the second edge of the pulse does not occur.
Because of the speed of the eTPU engine, the best approach to selecting a channel mode is to stay as simple
as possible unless performance demands more hardware complexity.
4.1
Selecting the Channel Mode
The simplest channel mode is sm_st. This mode can handle more than 85% of applications, as has been
shown by the success of the TPU. The information below can provide a guide when there is a reason to
change the channel hardware configuration.
4.1.1
Understanding the Channel Modes
The thirteen channel modes are combinations of subsystem configurations of the channel hardware. The
subfields that make up the notation for the modes are listed with their interpretation in
Table 9
.
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