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| 型號： | AN2933 |
| 英文描述： | Understanding the eTPU Channel Hardware |
| 中文描述： | 理解硬件頻道的eTPU |
| 文件頁數(shù)： | 22/40頁 |
| 文件大小： | 741K |
| 代理商： | AN2933 |
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Understanding the eTPU Channel Hardware, Rev. 0
Channel Modes
Freescale Semiconductor
22
Figure 4. Two Edge Timeouts of a Pulse
3.7
Either Match, Blocking, Single Transition
In the
EitherMatchBlockingSingleTransition()
(em_b_st) mode, the first match to be satisfied will block
the other and will generate a service request. The configuration of the channel logic when this mode is
selected is shown in
Figure 5
. Note that the matches are blocked by setting the MRLEs; therefore, if and
only if both matches occur simultaneously, both MRLs will be set.
This mode is particularly useful when the matches are setup to compare to asynchronous TCRs. For
example, one match might be satisfied by an angle and the other by a time. The MRLs will unambiguously
MatchA = Maximum Rise Limit
MatchB = Maximum Fall Limit
if
(MatchA_TransB)
//path B
MRLA set
=>
late rise
if
(MatchB_TransA)
//path D
MRLB set
=>
late fall
if (MatchA_TransB)
//path C
MRLA clear => normal pulse
If TransitionA occurs before MatchA, //path A
MRLA is blocked. (no service request here)
A
B
C
D
Table 6. Thread Decoding
Path
Service Request
S.R. Time
MRLA
MRLB
TDLA
TDLB
A-C
MatchA_TransB
C = TransB
clear
clear
set
set
A-D
MatchB_TransA
[&&
MatchA_TransB
]
MatchB
clear
set
set
clear/set*
B-C
MatchA_TransB
MatchA
set
clear
clear/set* clear/set*
B-D
MatchA_TransB
[&&
MatchB Trans A
]
MatchA
set
clear/set* clear/set* clear/set*
* Clear at service request, but may be set at service time, depending on timing.
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