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| 型號(hào)： | AN2933 |
| 英文描述： | Understanding the eTPU Channel Hardware |
| 中文描述： | 理解硬件頻道的eTPU |
| 文件頁數(shù)： | 23/40頁 |
| 文件大?。?/td> | 741K |
| 代理商： | AN2933 |
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Channel Modes
Understanding the eTPU Channel Hardware, Rev. 0
Freescale Semiconductor
23
indicate which match occurred first. Whenever a match occurs, it captures the TCRs indicated by both
action units.
If IPACA is programmed to detect an input pin transition, that transition will block the matches if they had
not yet occurred, capture (and overwrite if matches have occurred) the TCRs indicated by both action
units, and request service.
As in other _st modes, a second transition can be detected by Action Unit B, but the detection will not
request service. To avoid ambiguity if detection of an input transition is not required, the user should
program the IPACs to
NoDetect
.
Figure 5. Either Match, Blocking Modes (em_b_st, em_b_dt)
S
R
Q
TDLA
T2
S
R
Q
MRLA
T2
T4S
T2R
Q
MRLEA
sysclk
Comparator A
ucode ERW1
SRI
ucode TDL
Trans. Event A
S
R
Q
TDLB
T2
S
R
Q
MRLB
T2
T4S
T2R
Q
MRLEB
sysclk
Comparator B
ucode ERW2
ucode TDL
Trans. Event B
ucode
MRL1
ucode
MRL2
MatchA SR
MatchB SR
TransA SRTransB SR
CaptureB
load enable
CaptureA
load enable
MEF
Channel
Service
IPAC1[2]
Double Trans.
1
0
Double Trans.
D
NOTE:
all flip-flops but MRLE reset-dominant;
all control signals active high.
MEF
Channel
Service
IPAC2[2]
TS1
TS2
TS1
TS2
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