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參數(shù)資料
| 型號： | AN2635 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | On-Chip FLASH Programming Routines |
| 中文描述： | 片上閃存編程例程 |
| 文件頁數(shù)： | 4/36頁 |
| 文件大小： | 150K |
| 代理商： | AN2635 |
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On-Chip FLASH Programming Routines, Rev. 4
4
Freescale Semiconductor
How to Use the Routines
CPUSPD
To set up proper delays used in the PRGRNGE and ERARNGE routines, a value indicating the internal
operating frequency (f
op
) must be stored at CPUSPD, which is located at RAM address RAM+$9. In the
case of the MC68HC908LB8, the CPUSPD is located at $89. The CPUSPD value is the nearest integer
of f
op
(in MHz) times 4. For example, if f
op
is 4.2 MHz, the CPUSPD value is 17. If f
op
is 2.1 MHz, the
CPUSPD value is 8. Setting a correct CPUSPD value is very important to program or erase the FLASH
successfully.
LADDR
A range specifies the FLASH locations to be read, verified, or programmed. The 16-bit value in RAM
addresses RAM+$A and RAM+$B holds the last address of a range. The addresses RAM+$A and
RAM+$B are the high and low bytes of the last address, respectively. In the case of MC68HC908LB8, the
LADDR is located at $8A and $8B. LADDR is used for RDVRRNG and PRGRNGE routines.
DATA
DATA is the first location of the DATA array and is located at RAM address RAM+$C. For the
MC68HC908LB8, the DATA is located at $8C. The array is used for loading program or verify data. The
DATA array must be in the zero page and its size must match the size of the range to be programmed or
verified.
Registers H:X
In the RDVRRNG and PRGRNGE routines, registers H and X are initialized with a 16-bit value
representing the first address of a range. High and low bytes of the address are stored to registers H and
X, respectively. In the ERARNGE routine, registers H and X are initialized with an address which is within
the page or entire array to be erased.
How to Use the Routines
This section describes the details of each routine.
Table 2
provides necessary addresses used in the
on-chip FLASH routines for each MCU type.
Table 3
summarizes the six routines.
Table 2. MCU Type vs. Necessary Addresses Required for On-Chip FLASH Routines
MCU Name
RAM
$80
$80
$80
GetByte
$037E
$2B7E
$2800
PutByte
$0381
$2B81
$280F
RDVRRNG
$0384
$2B84
$2803
PRGRNGE
$038A
$2B8A
$2809
ERARNGE
$0387
$2B87
$2806
DELNUS
$038D
$2B8D
$280C
MC68HC908
LB8
MC68HC908
QL4
MC68HC908
QY4A
Series
(1)
MC68HC908
QB4/QB8,
MC68HC908
QY8
NOTES:
1. MC68HC908QY4A Series includes MC68HC908
QY4A
, MC68HC908
QY2A
, MC68HC908
QY1A
, MC68HC908
QT4A
,
MC68HC908
QT2A
, MC68HC908
QT1A
$80
$2800
$280F
$2803
$2809
$2806
$280C
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