參數(shù)資料
型號: AN2635
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: On-Chip FLASH Programming Routines
中文描述: 片上閃存編程例程
文件頁數(shù): 34/36頁
文件大?。?/td> 150K
代理商: AN2635
On-Chip FLASH Programming Routines, Rev. 4
34
Freescale Semiconductor
On-Chip Routines Source Code
;* is not served within a proper period in the user software.
;*********************************************************************
ERARNGE:
lda CTRLBYT ;if CTRLBYT is not either $40 or
and #$BF ; $00, the operation is skipped
bne Finish
sei ;block interrupts during erase
pshx ;temp save addr(lo) to free up X
ERAstep1:
lda #mERASE
brclr MASSBIT,CTRLBYT,PageErase
;if MASSBIT is set in the CTRLBYT,
ora #mMASS ; sets MASS and ERASE bits in A
PageErase: sta FLCR ;[..w.] (Erase Algo Step 1)
; set ERASE only, or MASS and ERASE
ERAstep2: lda FLBPR ;[4] (Erase Algo Step 2)
ERAstep3: sta ,x ;[.w] (Erase Algo Step 3)
;latch addr for Flash page or block
ERAstep4: lda CPUSPD ;[3] delay Tnvs (Erase Algo Step 4)
dbnza * ;[3+(3*A)]
ERAstep5: lda FLCR ;[4] leave MASS and ERASE as is
ora #mHVEN ;[2] set HVEN
sta FLCR ;[..w.] (Erase Algo Step 5)
ERAstep6: ;delay Terase (Erase Algo Step 6)
;slit up to allow COP service
lda #LoopErase ;[2] initialize Loop Counter
psha ;[2] Loop Count on stack for calcs
; using ' dec 1,sp' instruction
ServiceCOP: sta COPCTL ;[4] service COP
ldx #TERASE ;[2] about 200us delay
lda CPUSPD ;[3]
bsr DELNUS ;[4+(3*A*X)+5)]
dec 1,sp ;[5] decrement Loop Counter
bne ServiceCOP ;[3] loop if Loop Count not zero
;* bottom of COP service loop
;* total Terase time = setup from HVEN=1 + loop + overhead to ERASE=0
;* = 5 + (ELOOPS(3*A*X + 26)) + 15 33,180~ @8MHz (Terase=4.148mS)
pula ;[2] deallocate Loop Counter
; (Erase Algo Step 7)
sta COPCTL ;[4] service COP
ERAstep7:
lda FLCR ;[4]
and #{$FF-(mERASE+mMASS)}
;[2] clear ERASE and MASS bits
sta FLCR ;[..w.] (Erase Algo Step 8)
;[2]
ERAstep8: ldx #TNVHL ;delay for time Tnvhl
lda CPUSPD ;[3] Tnvhl is used for both
bsr DELNUS ; page and mass erase
;[4+(3*A*X)+5)] PAGE and MASS erase
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