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參數(shù)資料
| 型號： | AN2635 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | On-Chip FLASH Programming Routines |
| 中文描述： | 片上閃存編程例程 |
| 文件頁數(shù)： | 15/36頁 |
| 文件大?。?/td> | 150K |
| 代理商： | AN2635 |
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How to Use the Routines
On-Chip FLASH Programming Routines, Rev. 4
Freescale Semiconductor
15
DELNUS
DELNUS is a delay routine used in support of the ERARNGE routine. It can, however, be called
independently in the user software. DELNUS uses two parameters stored in the accumulator (A) and the
X register (X). Neither of these parameters is passed as an absolute value. The total delay (cycles)
resulting from this routine is:
DELNUS = 3
×
(A value)
×
(X value) + 8 cycles
where a value of A is 4 or greater and a value of X is 1 or greater. In the ERARNGE routines, the CPUSPD
value (which is a frequency parameter) is loaded into A.
Because this routine is called from a jump table, three additional cycles are included in the above
equation.
Interrupts are not masked and the COP is not serviced in DELNUS.
Initialization
A — Select A value between 4 and 255
X — Select X value between 1 and 255
Exit Condition
None
Example 9:
Generating a Delay
Initialized A = 16 and X = 8 to generate 100
μ
s delay at f
op
= 4 MHz
DELNUS equ $038D ;LB8 DELNUS jump address
lda #$10 ;[2]A=16
ldx #$08 ;[2]X=8
jsr DELNUS ;[4]Call DELNUS routine
In this example, the total delay time is 8 + (3
×
16
×
8 + 8) cycles = 400 cycles (100
μ
s).
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