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參數(shù)資料
| 型號： | AN1816 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | USING THE HC912B32 TO IMPLEMENT THE DISTRIBUTED SYSTEMS INTERFACE (DSI) PROTOCOL |
| 中文描述： | 使用本HC912B32為實施分布式系統(tǒng)接口（DSI）協(xié)議 |
| 文件頁數(shù)： | 4/24頁 |
| 文件大小： | 332K |
| 代理商： | AN1816 |
AN1816
4
Application Note
the slave draws additional current from the source during the bit time.
Conversely, no extra current is drawn when responding with a logic zero.
Figure 3 Current Waveform
shows a representation of the current
waveform referenced to a voltage waveform.
Figure 3 Current Waveform
Message
Format
DSI messages are composed of individual words separated by a
minimum frame delay. Transfers are full duplex, that is, command
messages from the master occur at the same time as responses from
the slaves. This is an important feature of the DSI as it doubles the
effective signal bandwidth. Slave responses to commands occur during
the next command message. This allows slaves time to decode the
command, act upon it and then respond to the master. The minimum
frame delay is present to allow recharge of energy storage devices in the
slaves. This is necessary because the slave receives its power from the
signal line.
Message
Encoding
Message encoding depends on the direction of the transfer. Command
and control messages are sent from the master to the slave. Response
messages are sent from the slaves to the master. In both cases there
are long word and short word messages. A long word consists of 16-bits
of information followed by a 4-bit cyclic redundancy check (CRC). A
short word is composed of 8-bits of information followed by the 4-bit
CRC.
Voltage
(from Master)
Current
(from Slave)
Logic 1
Logic 0
Logic 0
Logic 1
Logic 1
Logic 0
Logic 1
Logic 0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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