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參數(shù)資料
| 型號： | AN1816 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | USING THE HC912B32 TO IMPLEMENT THE DISTRIBUTED SYSTEMS INTERFACE (DSI) PROTOCOL |
| 中文描述： | 使用本HC912B32為實施分布式系統(tǒng)接口（DSI）協(xié)議 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 332K |
| 代理商： | AN1816 |
AN1816
3
Distributed Systems Interface (DSI) Overview
The DSI protocol has been designed such that the first third of a voltage
mode signal bit is always low and the last third is always high. The
central third defines the signal value. For a logic zero the master
produces a signal that is low for 2/3 of the bit time and high for the final
1/3. For a logic one the signal is low for 1/3 of the bit time and high for
2/3 of the bit time. Each slave has a built-in oscillator. This feature of the
DSI message protocol has created a high immunity to temporal
distortion. Consequently, each slave IC is simpler and cheaper to design
while still able to capture all messages accurately. An added benefit is
that it allows for a range of operating frequencies.
Bus Voltage Levels
The voltage mode signalling uses a tri-level bus as shown in
Figure 2
Tri-level bus
.
Figure 2 Tri-level bus
The DSI bus provides power to the slave nodes as well as supporting
bi-directional communication between the slave nodes and the master.
When the bus is at the idle voltage, which ranges from 8 to 25 volts, it
supplies power to the slave nodes. A high threshold level (typically 6V)
and a low threshold level (typically 3V) play a significant part in message
transmission. The start of a word occurs when the bus voltage drops
from the idle voltage below the high threshold level and then below the
low threshold level. Data values are determined by the ratio of time spent
above and below the low threshold. The voltage rising above the high
threshold level signals the end of a word.
Current Mode
Encoding
Slave responses to commands are returned by modulating the amount
of current sunk by the device. This is measured at the end of each bit to
determine a ‘zero’ or ‘one’ response. When responding with a logic one,
Idle
High Threshold
Signal High
Low Threshold
Signal Low
Gnd
End of First Bit ("0")
Start of Word
End of Word
End of Second Bit ("1")
Start of Next Word
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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