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參數(shù)資料
| 型號： | AMMCL00XA |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | JT 3C 3#20 SKT RECP |
| 中文描述： | 2或4兆字節(jié)3.0伏，只有Flash微型卡 |
| 文件頁數(shù)： | 18/36頁 |
| 文件大小： | 172K |
| 代理商： | AMMCL00XA |
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18
AmMCL00XA
P R E L I M I NA R Y
1. The system (CPU) keeps the address valid during
the entire Embedded Programming operation, or
2. Once the system executes the Embedded Pro-
gramming command sequence, the CPU takes
away the address from the device and becomes
free to do other tasks. In this case, the CPU is re-
quired to keep track of the valid address by loading
it into a temporary register. When the CPU comes
back for performing Data Polling, it should reassert
the same address.
3. The host may monitor BUSY# (RY/BY#) to deter-
mine the status of the Embedded Algorithm in
progress. A “0” indicates that the device is busy; a
“1” indicates that the algorithm is complete.
However, since the Embedded Programming operation
takes only 9
μ
s typically, it may be easier for the CPU
to keep the address stable during the entire Embedded
Programming operation instead of reasserting the valid
address during Data Polling. Any commands written to
the device during this period will be ignored. Figure 5
and Table 10 illustrate the Embedded Program Algo-
rithm, a typical command string, and bus operation.
Table 10.
Embedded Program Algorithm
Figure 5.
Embedded Program Algorithm
Reset Command
The device will automatically power up in the read/re-
set state. In this case, a command sequence is not re-
quired to read data. Standard microprocessor cycles
will retrieve array data. This default value ensures that
no spurious alteration of the memory content occurs
during the power transition. Refer to the AC Character-
istics section for the specific timing parameters.
The reset operation is initiated by writing the read/reset
command sequence into the command register. Micro-
processor read cycles retrieve array data from the
memory. The device remains enabled for reads until
the command register contents are altered.
Sector Erase Suspend
The Erase Suspend command allows the user to inter-
rupt a Sector Erase operation and then perform data
read or programs in a sector not being erased. This
command is applicable
only
during the Sector Erase
operation, which includes the time-out period for Sector
Erase. The Erase Suspend command will be ignored if
written during the execution of the Chip Erase opera-
tion or Embedded Program Algorithm (but will reset the
chip if written improperly during the command se-
quences.) Writing the Erase Suspend command during
the Sector Erase time-out results in immediate termina-
tion of the time-out period and suspension of the erase
operation. Once in Erase Suspend, the device is avail-
Bus
Operation
Command
Comments
Standby
Wait for V
CC
ramp
Write
Embedded Program
command sequence
3 bus cycle operation
Write
Program
Address/Data
1 bus cycle operation
Read
Data
Poll or check
BUSY# (RY/BY#) to
verify program
21138E-6
Write Embedded Write Command
Sequence per Tables 5–7
Verify
Data
N
Y
Data
Poll Device
or wait for BUSY# (RY/BY#)
Y
Increment
Address
N
Start
Completed
Last
Address
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