參數(shù)資料
型號: AM79C975
廠商: Advanced Micro Devices, Inc.
英文描述: PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
中文描述: PCnet⑩快速三單芯片10/100 Mbps的PCI以太網(wǎng)控制器集成PHY
文件頁數(shù): 271/304頁
文件大?。?/td> 2092K
代理商: AM79C975
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Am79C973/Am79C975
271
P R E L I M I N A R Y
PHY by generating MII management frames. These
frames will be sent roughly every 900 ms. These
frames are necessary so that the Network Port Man-
ager can monitor the current active link and can select
a different network port if the current link goes down.
Auto-Negotiation
Through the external PHY, the following capabilities are
possible: 100BASE-T4, 100BASE-TX Full-/Half-Du-
plex, and 10BASE-T Full-/Half-Duplex. The capabilities
are then sent to a link partner that will also send its ca-
pabilities. Both sides look to see what is possible and
then they will connect at the greatest possible speed
and capability as defined in the IEEE 802.3u standard
and according to Table C-68.
By default, the link partner must be at least 10BASE-T
half-duplex capable. The Am79C973/Am79C975 con-
troller can automatically negotiate with the network and
yield the highest performance possible without soft-
ware support. See the section on
Network Port Man-
ager
for more details.
Auto-Negotiation goes further by providing a message-
based communication scheme called,
Next Pages
, be-
fore connecting to the Link Partner.
This feature is not
supported in Am79C973/Am79C975 unless the
DANAS (BCR32, bit 10) is selected and the software
driver is capable of controlling the external PHY.
A com-
plete bit description of the MII and Auto-Negotiation
registers can be found in the
MII Management Regis-
ters
section.
Automatic Network Port Selection
If ASEL (BCR2, bit 0) is set to 1 and DANAS (BCR 32,
bit 7) is set to 0, then the Network Port Manager will
start to configure the external PHY if it detects the ex-
ternal PHY on the MII Interface.
Automatic Network Selection: Exceptions
If ASEL (BCR2, bit 0) is set to 0 or DANAS (BCR 32, bit
7) is set to 1, then the Network Port Manager will dis-
continue actively trying to establish the connections. It
is assumed that the software driver is attempting to
configure the network port and the Am79C973/
Am79C975 controller will always defer to the software
driver. When The ASEL is set to 0, the software driver
should then configure the ports with PORTSEL
(CSR15, bits 7-8).
Note:
It is highly recommended that ASEL and
PORTSEL be used when trying to manually configure
a specific network port.
In order to manually configure the External PHY, the
recommended procedure
is to force the PHY config-
urations when Auto-Negotiation is
not
enabled. Set the
DANAS bit (BCR32, bit 7) to turn off the Network Port
Manager. Then clear the XPHYANE (BCR32, bit 5) and
set either XPHYFD (BCR32, bit 4) or XPHYSP
(BCR32, bit 3) or both. The Network Port Manager will
send a few MII frames to the PHY to validate the con-
figuration.
CAUTION:
The Network Port Manager utilizes the
PHYADD (BCR33, bits 9-5) to communicate with the
external PHY during the automatic port selection pro-
cess. The PHYADD is copied into a shadow register
after the Am79C973/Am79C975 controller has read
the configuration information from the EEPROM. Ex-
treme care must be exercised by the host software not
to access BCR33 during this time. A read of PVALID
(BCR19, bit 15) before accessing BCR33 will guaran-
tee that the PHYADD has been shadowed.
Am79C973/Am79C975
s Automatic Network Port se-
lection mechanism falls within the following general
categories:
External PHY
Not
Auto-Negotiable
External PHY Auto-Negotiable
Automatic Network Selection: External PHY
Not
Auto-Negotiable
This case occurs when the MIIPD (BCR32, bit 14) bit is
1. This indicates that there is an external PHY attached
to Am79C973/Am79C975 controller
s MII. If more than
one external PHY is attached to the MII Management
Interface, then the DANAS (BCR32, bit 7) bit must be
set to 1 and then all configuration control should revert
to software. The Am79C973/Am79C975 controller will
read the register of the external PHY to determine its
status and network capabilities. See
the MII Manage-
ment Registers
section for the bit descriptions of the
MII Status register. If the external PHY is not Auto-Ne-
gotiation capable and/or the XPHYANE (BCR32, bit 5)
bit is set to 0, then the Network Port Manager will match
up the external PHY capabilities with the XPHYFD
(BCR 32, bit 4) and the XPHYSP (BCR32, bit 3) bits
programmed from the EEPROM. The Am79C973/
Am79C975 controller will then program the external
PHY with those values. A new read of the external
PHYs MII Status register will be made to see if the link
is up. If the link does not come up as programmed after
a specific time, the Am79C973/Am79C975 controller
will fail the external PHY link. The Network Port Man-
Table 68. Auto-Negotiation Capabilities
Network Speed
Physical Network Type
200 Mbps
100BASE-X, Full Duplex
100 Mbps
100BASE-T4, Half Duplex
100 Mbps
100BASE-X, Half Duplex
20 Mbps
10BASE-T, Full Duplex
10 Mbps
10BASE-T, Half Duplex
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AM79C975BKC\\W 制造商:Advanced Micro Devices 功能描述:
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