參數(shù)資料
型號(hào)： AM70PDL127CDH
廠商： Advanced Micro Devices, Inc.
英文描述： 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
中文描述： 2 × 64兆位（8米× 16位）的CMOS 3.0伏特，只有頁(yè)面模式閃存數(shù)據(jù)存儲(chǔ)128兆位（8米× 16位）的CMOS
文件頁(yè)數(shù)： 95/127頁(yè)
文件大?。?/td> 849K
代理商： AM70PDL127CDH
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November 24, 2003
Am70PDL127CDH/Am70PDL129CDH
93
A D V A N C E I N F O R M A T I O N
Table 6.
System Interface String
Table 7.
Device Geometry Definition
Addresses
(x16)
Data
Description
1Bh
0027h
V
CC
Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Ch
0036h
V
CC
Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Dh
0000h
V
PP
Min. voltage (00h = no V
PP
pin present)
1Eh
0000h
V
PP
Max. voltage (00h = no V
PP
pin present)
1Fh
0007h
Typical timeout per single byte/word write 2
N
μs
20h
0007h
Typical timeout for Min. size buffer write 2
N
μ
s (00h = not supported)
21h
000Ah
Typical timeout per individual block erase 2
N
ms
22h
0000h
Typical timeout for full chip erase 2
N
ms (00h = not supported)
23h
0001h
Max. timeout for byte/word write 2
N
times typical
24h
0005h
Max. timeout for buffer write 2
N
times typical
25h
0004h
Max. timeout per individual block erase 2
N
times typical
26h
0000h
Max. timeout for full chip erase 2
N
times typical (00h = not supported)
Addresses
(x16)
Data
Description
27h
0017h
Device Size = 2
N
byte
28h
29h
0002h
0000h
Flash Device Interface description (refer to CFI publication 100)
2Ah
2Bh
0005h
0000h
Max. number of byte in multi-byte write = 2
N
(00h = not supported)
2Ch
0001h
Number of Erase Block Regions within device (01h = uniform device, 02h = boot device)
2Dh
2Eh
2Fh
30h
007Fh
0000h
0000h
0001h
Erase Block Region 1 Information
(refer to the CFI specification or CFI publication 100)
31h
32h
33h
34h
0000h
0000h
0000h
0000h
Erase Block Region 2 Information (refer to CFI publication 100)
35h
36h
37h
38h
0000h
0000h
0000h
0000h
Erase Block Region 3 Information (refer to CFI publication 100)
39h
3Ah
3Bh
3Ch
0000h
0000h
0000h
0000h
Erase Block Region 4 Information (refer to CFI publication 100)
相關(guān)PDF資料
PDF描述
Am70PDL127CDH66IS 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
Am70PDL127CDH66IT 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
Am70PDL127CDH85IS 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
Am70PDL127CDH85IT 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
Am70PDL129CDH 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM70PDL127CDH66I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
AM70PDL127CDH66IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
AM70PDL127CDH66IT 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
AM70PDL127CDH85I 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
AM70PDL127CDH85IS 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
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