參數(shù)資料
型號(hào): AM50DL128CH
英文描述: Am50DL128CH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
中文描述: Am50DL128CH -堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁(yè)數(shù): 62/70頁(yè)
文件大小: 1042K
代理商: AM50DL128CH
May 19, 2003
Am50DL9608G
61
P R E L I M I N A R Y
PSEUDO SRAM AC CHARACTERISTICS
Read Cycle
Notes:
1. WE# = V
IH
.
2. t
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
3. At any given temperature and voltage condition, t
HZ
(Max.) is less than t
LZ
(Min.) both for a given device and from device to device
interconnection.
4. Do not access device with cycle timing shorter than t
RC
for continuous periods < 10 μs.
Figure 29.
Pseudo SRAM Read Cycle
Data Valid
High-Z
t
RC
CE#1s
Address
OE#
Data Out
t
OH
t
AA
t
CO1
t
OE
t
OLZ
t
BLZ
t
LZ
t
OHZ
t
HZ
CE2s
t
CO2
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