參數(shù)資料
型號： AM49DL3208G
英文描述： Am49DL3208G - Stacked Multi-Chip Package (MCP) Flash Memory and pSRAM
中文描述： Am49DL3208G -堆疊式多芯片封裝（MCP）的閃存和移動存儲芯片
文件頁數(shù)： 49/62頁
文件大?。?/td> 933K
代理商： AM49DL3208G
September 19, 2003
Am49DL3208G
47
A D V A N C E I N F O R M A T I O N
FLASH AC CHARACTERISTICS
OE#
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
RY/BY#
CE#f
Note:
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read
cycle, and array data read cycle.
Figure 25.
Toggle Bit Timings (During Embedded Algorithms)
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#f to
toggle DQ2 and DQ6.
Figure 26.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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