
44
Am29LV640MH/L
February 16, 2003
ADV ANCE
I N FO RMAT I O N
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase and Programming Performance” section for more information.
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. Word/Byte programming specification is based upon a single word/byte programming operation not utilizing the write buffer.
6. AC Specifications listed are tested with V
IO = VCC. Contact AMD for information on AC operation with VIO
≠ V
CC.
Parameter
Speed Options
JEDEC
Std.
Description
90R
101,
101R
112,
112R
120,
120R
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
90
100
110
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit
polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
45
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
352
s
Effective Write Buffer Program
Operation (Notes 2, 4)
Per Byte
Typ
11
s
Per Word
Typ
22
s
Accelerated Effective Write Buffer
Program Operation (Notes 2, 4)
Per Byte
Typ
8.8
s
Per Word
Typ
17.6
s
Single Word/Byte Program
Operation (Note 2, 5)
Byte
Typ
100
s
Word
100
Single Word/Byte Accelerated
Programming Operation (Note 2, 5)
Byte
Typ
90
Word
90
s
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
t
VHH
V
HH Rise and Fall Time (Note 1)
Min
250
ns
t
VCS
V
CC Setup Time (Note 1)
Min
50
s
t
BUSY
WE# High to RY/BY# Low
Min
90
100
110
120
ns