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| 型號： | AM29LV320DB120WME |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 120 ns, PBGA48 |
| 封裝： | 6 X 12 MM, 0.80 MM PITCH, FBGA-48 |
| 文件頁數(shù)： | 14/53頁 |
| 文件大?。?/td> | 1008K |
| 代理商： | AM29LV320DB120WME |
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July 30, 2002
Am29LV320D
21
Figure 3.
SecSi Sector Protect Verify
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Table 14 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
CC power-up
and power-down transitions, or from system noise.
Low VCC Write Inhibit
When V
CC is less than VLKO, the device does not ac-
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to the read mode. Subsequent
writes are ignored until V
CC is greater than VLKO. The
system must provide the proper signals to the control
pins to prevent unintentional writes when V
CC is
greater than V
LKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
IL, CE# = VIH or WE# = VIH. To initiate a write cycle,
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
IL and OE# = VIH during power up,
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to the read mode on power-up.
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h in word mode (or address AAh in byte mode), any
time the device is ready to read array data. The sys-
tem can read CFI information at the addresses given
system must write the reset command.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
system must write the reset command to return the de-
vice to the autoselect mode.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the
Wor ld Wide We b at ht t p:/ /w ww. amd. co m/ prod-
ucts/nvd/overview/cfi.html. Alternatively, contact an
AMD representative for copies of these documents.
Write 60h to
any address
Write 40h to SecSi
Sector address
with A6 = 0,
A1 = 1, A0 = 0
START
RESET# =
VIH or VID
Wait 1
s
Read from SecSi
Sector address
with A6 = 0,
A1 = 1, A0 = 0
If data = 00h,
SecSi Sector is
unprotected.
If data = 01h,
SecSi Sector is
protected.
Remove VIH or VID
from RESET#
Write reset
command
SecSi Sector
Protect Verify
complete
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