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參數(shù)資料
| 型號： | AM29BDS640GTD4WSI |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 14 ns, PBGA80 |
| 封裝： | 11 X 12 MM, 0.80 MM PITCH, FBGA-80 |
| 文件頁數(shù)： | 54/65頁 |
| 文件大?。?/td> | 899K |
| 代理商： | AM29BDS640GTD4WSI |
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October 31, 2002
Am29BDS640G
57
AD V A NCE
INF O R M A T IO N
AC CHARACTERISTICS
Notes:
1. RDY active with data (A18 = 1 in the Burst Mode Configuration Register).
2. RDY active one clock cycle before data (A18 = 0 in the Burst Mode Configuration Register).
3. Cxx indicates the clock that triggers Dxx on the outputs; for example, C60 triggers D60. Figure shows the device not crossing
a bank in the process of performing an erase or program.
Figure 30.
Latency with Boundary Crossing
CLK
Address (hex)
C60
C61
C62
C63
C64
C65
C66
C67
D60
D61
D62
D63
D64
D65
D66
D67
(stays high)
AVD#
RDY
Data
Address boundary occurs every 64 words, beginning at address
00003Fh (00007Fh, 0000BFh, etc.). Address 000000h is also a boundary crossing.
3C
3D
3E
3F
40
41
42
43
latency
RDY
latency
tRACC
(Note 1)
(Note 2)
tRACC
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