參數(shù)資料
型號： ADV7391BCPZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 105/108頁
文件大?。?/td> 0K
描述： IC VIDEO ENCODER SD/HD 32-LFCSP
產(chǎn)品變化通告： ADV734x, ADV739x Feature Improvement
標(biāo)準(zhǔn)包裝： 5,000
類型： 視頻編碼器
應(yīng)用： 機(jī)頂盒，視頻播放器，顯示器
電壓 - 電源，模擬： 2.6 V ~ 3.46 V
電壓 - 電源，數(shù)字： 1.71 V ~ 1.89 V
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ（5x5）
包裝： 帶卷 (TR)
配用： EVAL-ADV7391EBZ-ND - BOARD EVAL FOR ADV7391 ENCODER
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 96 of 108
Table 83. 8-Bit 625i YCrCb In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 84. 8-Bit 625i YCrCb In (EAV/SAV), RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB out. SSAF PrPb
filter enabled. Active video edge
control enabled.
Table 85. 8-Bit 625i YCrCb In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 86. 10-Bit 625i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
10-bit input enabled.
Table 87. 10-Bit 625i YCrCb In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
10-bit input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 88. 10-Bit 625i YCrCb In, CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC3
Pixel Data Valid. CVBS/Y-C (S-Video)
Out. SSAF PrPb filter enabled. Active
video edge control enabled.
0x88
0x10
10-bit input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in PAL mode (27 MHz input clock).
0x8D
0x8A
0x8E
0x09
0x8F
0x2A
Table 89. 10-Bit 625i YCrCb In (EAV/SAV), RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
10-bit input enabled.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7391EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7391WBCPZ 制造商:Analog Devices 功能描述:
ADV7391WBCPZ-RL 制造商:Analog Devices 功能描述:
ADV7392 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7392BCPZ 制造商:Analog Devices 功能描述:
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