參數(shù)資料
型號： ADV7180
廠商： Analog Devices, Inc.
英文描述： 10-Bit, 4 x Oversampling SDTV Video Decoder
中文描述： 10位，4個采樣標清視頻解碼器
文件頁數(shù)： 104/112頁
文件大?。?/td> 1320K
代理商： ADV7180
ADV7180
Rev. A | Page 104 of 112
User Sub Map
Address Register
0x78
Bit
(Shading Indicates
Default State)
7 6 5 4 3 2 1 0
Comments
Closed captioning not detected
Closed captioning detected
Closed captioning decoded from
odd field
Closed captioning decoded from
even field
CGMS/WSS not detected
CGMS/WSS detected
VPS not detected
VPS detected
Bit Description
CC_AVL.
Notes
CC_CLEAR resets the
CC_AVL bit
0
0
1
CC_EVEN_FIELD.
1
0
1
0
0
1
CGMS_WSS_AVL.
CGMS_WSS_CLEAR resets
the CGMS_WSS_AVL bit
Reserved.
GS_PDC_VPS_UTC_AVL.
GS_PDC_VPS_UTC_CLEAR
resets the
GS_PDC_VPS_UTC_AVL
bit
0
1
0
1
0
1
0
0
0
1
Gemstar_1× detected
Gemstar_2× detected
VITC not detected
VITC detected
Teletext not detected
Teletext detected
Does not reinitialize the CCAP registers
Reinitializes the CCAP readback registers
Does not reinitialize the CGMS/WSS
registers
Reinitializes the CGMS/WSS readback
registers
Does not reinitialize the GS/PDC/VPS/
UTC registers
Refreshes the GS/PDC/VPS/UTC
readback registers
Does not reinitialize the VITC registers
Reinitializes the VITC readback registers
Decoded Byte 1 of CCAP
GS_DATA_TYPE.
VITC_AVL.
VITC_CLEAR resets the
VITC_AVL bit
VDP_STATUS
(Read Only)
TTXT_AVL.
CC_CLEAR.
This is a self-clearing bit
Reserved.
CGMS_WSS_CLEAR.
This is a self-clearing bit
1
Reserved.
GS_PDC_VPS_UTC_CLEAR.
0
0
This is a self-clearing bit
1
Reserved.
VITC_CLEAR.
0
x
0
1
0
x
x
x
x
This is a self-clearing bit
x
VDP_STATUS_CLEAR
(Write Only)
Reserved.
CCAP_BYTE_1[7:0].
x
0x79
VDP_CCAP_DATA_0
(Read Only)
VDP_CCAP_DATA_1
(Read Only)
VDP_CGMS_WSS_DATA_0
(Read Only)
VDP_CGMS_WSS_DATA_1
(Read Only)
VDP_CGMS_WSS_DATA_2
(Read Only)
VDP_GS_VPS_PDC_UTC_0
(Read Only)
VDP_GS_VPS_PDC_UTC_1
(Read Only)
VDP_GS_VPS_PDC_UTC_2
(Read Only)
VDP_GS_VPS_PDC_UTC_3
(Read Only)
VDP_VPS_PDC_UTC_4
(Read Only)
VDP_VPS_PDC_UTC_5
(Read Only)
VDP_VPS_PDC_UTC_6
(Read Only)
VDP_VPS_PDC_UTC_7
(Read only)
VDP_VPS_PDC_UTC_8
(Read Only)
VDP_VPS_PDC_UTC_9
(Read Only)
VDP_VPS_PDC_UTC_10
(Read Only)
x
0x7A
CCAP_BYTE_2[7:0].
x
x
x
x
x
x
x
x
Decoded Byte 2 of CCAP
CGMS_CRC[5:2].
Reserved.
CGMS_WSS[13:8].
CGMS_CRC[1:0].
CGMS_WSS[7:0].
0 0 0 0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Decoded CRC sequence for CGMS
Decoded CGMS/WSS data
Decoded CRC sequence for CGMS
Decoded CGMS/WSS data
0x7D
x
x
x
x
0x7E
0x7F
0x84
GS_VPS_PDC_UTC_BYTE_0[7:0].
x
x
x
x
x
x
x
x
Decoded Gemstar/VPS/PDC/UTC data
0x85
GS_VPS_PDC_UTC_BYTE_1[7:0].
x
x
x
x
x
x
x
x
Decoded Gemstar/VPS/PDC/UTC data
0x86
GS_VPS_PDC_UTC_BYTE_2[7:0].
x
x
x
x
x
x
x
x
Decoded Gemstar/VPS/PDC/UTC data
0x87
GS_VPS_PDC_UTC_BYTE_3[7:0].
x
x
x
x
x
x
x
x
Decoded Gemstar/VPS/PDC/UTC data
0x88
VPS_PDC_UTC_BYTE_4[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
0x89
VPS_PDC_UTC_BYTE_5[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
0x8A
VPS_PDC_UTC_BYTE_6[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
0x8B
VPS_PDC_UTC_BYTE_7[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
0x8C
VPS_PDC_UTC_BYTE_8[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
0x8D
VPS_PDC_UTC_BYTE_9[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
0x8E
VPS_PDC_UTC_BYTE_10[7:0].
x
x
x
x
x
x
x
x
Decoded VPS/PDC/UTC data
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ADV7180BCPZ 10-Bit, 4 x Oversampling SDTV Video Decoder
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相關代理商/技術參數(shù)
參數(shù)描述
ADV7180_12 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 4?? Oversampling SDTV Video Decoder
ADV7180BCP32Z 制造商:Analog Devices 功能描述:10-BIT, 4? OVERSAMPLING SDTV VIDEO DECODER - Trays
ADV7180BCP32Z-RL 制造商:Analog Devices 功能描述:IC
ADV7180BCPZ 功能描述:IC VIDEO DECODER SDTV 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標準包裝:250 系列:- 類型:電平移位器 應用:LCD 電視機/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應商設備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND
ADV7180BCPZ 制造商:Analog Devices 功能描述:IC VIDEO DECODER 10BIT 57.27MSPS LFCSP40
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