參數(shù)資料
型號(hào): ADT7473ARQZ-1REEL7
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2.50Cel, RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, MO-137AB, QSOP-16
文件頁數(shù): 32/72頁
文件大?。?/td> 1494K
代理商: ADT7473ARQZ-1REEL7
ADT7473/ADT7473-1
Rev. C | Page 38 of 72
STEP 4: PWMMIN FOR EACH PWM (FAN) OUTPUT
PWMMIN is the minimum PWM duty cycle at which each fan in
the system runs. It is also the start speed for each fan under
automatic fan control once the temperature rises above TMIN
(see Figure 55). For maximum system acoustic benefit, PWMMIN
should be set as low as possible. Depending on the fan used, the
PWMMIN setting is usually in the 20% to 33% duty cycle range.
This value can be found through fan validation.
TEMPERATURE
TMIN
100%
PWMMIN
0%
P
W
M
DUT
Y
CY
CL
E
0
46
86-
0
52
Figure 55. PWMMIN Determines Minimum PWM Duty Cycle
More than one PWM output can be controlled from a single
temperature measurement channel. For example, Remote 1
temperature can control PWM1 and PWM2 outputs. If two
different fans are used on PWM1 and PWM2, the fan
characteristics can be set up differently. As a result, Fan 1 driven
by PWM1 can have a different PWMMIN value than that of Fan 2
connected to PWM2. Figure 56 illustrates this as PWM1MIN
(front fan) is turned on at a minimum duty cycle of 20%, while
PWM2MIN (rear fan) turns on at a minimum of 40% duty cycle.
However, both fans turn on at exactly the same temperature,
defined by TMIN.
TEMPERATURE
TMIN
100%
PWM1MIN
0%
P
W
M
DUT
Y
CY
C
L
E
PW
M1
PW
M2
PWM2MIN
046
86
-0
53
Figure 56. Operating Two Different Fans
from a Single Temperature Channel
Programming the PWMMIN Registers
The PWMMIN registers are 8-bit registers that allow the
minimum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the minimum PWM
duty cycle to be set in steps of 0.39%.
The value to be programmed into the PWMMIN register is given by
Value (decimal) = PWMMIN/0.39
Example 1
For a minimum PWM duty cycle of 50%
Value (decimal) = 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Example 2
For a minimum PWM duty cycle of 33%
Value (decimal) = 33/0.39 = 85 (decimal)
Value = 85 (decimal) or 54 (hex)
PWMMIN Registers
Register 0x64, PWM1 Minimum Duty Cycle = 0x80
(50% default)
Register 0x65, PWM2 Minimum Duty Cycle = 0x80
(50% default)
Register 0x66, PWM3 Minimum Duty Cycle = 0x80
(50% default)
Note on Fan Speed and PWM Duty Cycle
The PWM duty cycle does not directly correlate to fan speed in
RPM. Running a fan at 33% PWM duty cycle does not equate to
running the fan at 33% speed. Driving a fan at 33% PWM duty
cycle actually runs the fan at closer to 50% of its full speed. This
is because fan speed in %RPM generally relates to the square
root of PWM duty cycle. Given a PWM square wave as the
drive signal, fan speed in RPM approximates to
10
%
×
=
cycle
duty
PWM
fanspeed
STEP 5: PWMMAX FOR PWM (FAN) OUTPUTS
PWMMAX is the maximum duty cycle at which each fan in the
system runs under the automatic fan speed control loop. For
maximum system acoustic benefit, PWMMAX should be as low as
possible, but should be capable of maintaining the processor
temperature limit at an acceptable level. If the THERM
temperature limit is exceeded, the fans are still boosted to 100%
for fail-safe cooling (see Figure 57).
There is a PWMMAX limit for each fan channel. The default value
of this register is 0xFF and thus has no effect unless it is
programmed.
TEMPERATURE
TMIN
100%
PWMMIN
0%
P
W
M
D
U
T
Y
CYCL
E PWM
MAX
0
4
686
-05
4
Figure 57. PWMMAX Determines Maximum PWM Duty Cycle
Below the THERM Temperature Limit
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參數(shù)描述
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