參數(shù)資料
型號(hào): ADT7473ARQZ-1REEL7
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2.50Cel, RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, MO-137AB, QSOP-16
文件頁(yè)數(shù): 15/72頁(yè)
文件大?。?/td> 1494K
代理商: ADT7473ARQZ-1REEL7
ADT7473/ADT7473-1
Rev. C | Page 22 of 72
Periodically poll the status registers. If the interrupt status bit
has cleared, reset the corresponding interrupt mask bit to 0.
This causes the SMBALERT output and status bits to behave as
shown in Figure 32.
STICKY
STATUS BIT
HIGH LIMIT
TEMPERATURE
CLEARED ON READ
(TEMP BELOW LIMIT)
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
INTERRUPT
MASK BIT SET
SMBALERT
04
68
6-
02
9
INTERRUPT MASK BIT
CLEARED
(SMBALERT RE-ARMED)
Figure 32. How Masking the Interrupt Source Affects SMBALERT Output
Masking Interrupt Sources
Register 0x74, Interrupt Mask Register 1
Register 0x75, Interrupt Mask Register 2
These registers allow individual interrupt sources to be masked
out to prevent SMBALERT interrupts. Masking an interrupt
source prevents only the SMBALERT output from being
asserted; the appropriate status bit is set normally.
Interrupt Mask Register 1 (0x74)
Bit 7 (OOL) = 0, when one or more alerts are generated in
Interrupt Status Register 2, assuming all the mask bits in the
Interrupt Mask Register 2 (0x75) =1; SMBALERT is still
asserted.
OOL=1, when one or more alerts are generated in Interrupt
Status Register 2, assuming all the mask bits in the Interrupt
Mask Register 2 (0x75) =1; SMBALERT is not asserted.
Bit 6 (R2T) = 1, masks SMBALERT for Remote 2 temperature
Bit 5 (LT) = 1, masks SMBALERT for local temperature.
Bit 4 (R1T) = 1, masks SMBALERT for Remote 1 temperature.
Bit 2 (VCC) = 1, masks SMBALERT for VCC channel.
Bit 1 (VCCP) = 1, masks SMBALERT for VCCP channel.
Interrupt Mask Register 2 (Reg. 0x75)
Bit 7 (D2) = 1, masks SMBALERT for Diode 2 errors.
Bit 6 (D1) = 1, masks SMBALERT for Diode 1 errors.
Bit 5 (FAN4) = 1, masks SMBALERT for Fan 4 failure.
If the TACH4 pin is being used as the THERM input, this bit
masks SMBALERT for a THERM event.
Bit 4 (FAN3) = 1, masks SMBALERT for Fan 3.
Bit 3 (FAN2) = 1, masks SMBALERT for Fan 2.
Bit 2 (FAN1) = 1, masks SMBALERT for Fan 1.
Bit 1 (OVT) = 1, masks SMBALERT for overtemperature
(exceeding THERM limits).
Enabling the SMBALERT Interrupt Output
The SMBALERT interrupt function is disabled by default. Pin 5
or Pin 9 can be reconfigured as an SMBALERT output to signal
out-of-limit conditions. (SMBALERT function is available only
on Pin 9 of ADT7473-1.)
Table 15. ADT7473 Configuring Pin 5 as SMBALERT Output
Register
Bit Setting
Configuration Register 3 (0x78)
[0] ALERT = 1
The ADT7473-1 THERM_LATCH function latches and asserts
when temperature rises 0.25°C above the THERM limit for the
selected remote channel. Due to a THERM event, the fans spin
at full speed. This can be disabled by setting Bit 2 in Configur-
ation Register 0x7D.
Pin 5 remains latched until temperature falls below THERM
limit for the selected zone, Remote Channel D1 or Remote
Channel D2, and Bit 0 in Status Register 2 is cleared. By default
on the ADT7473-1, the THERM limit is set as 136°C for Remote
Channel 2 and 100°C for Remote Channel 1.
Assigning THERM Functionality to a Pin
Pin 9 on the ADT7473/ADT7473-1 has four possible
functions: SMBALERT, THERM, GPIO, and TACH4. The user
chooses the required functionality by setting Bit 0 and Bit 1 of
Configuration Register 4 (0x7D).
Table 16.
Bit1
Bit 0
Function
0
1
TACH4
0
THERM
1
SMBus ALERT
1
0
GPIO
Once Pin 9 is configured as THERM, it must be enabled by
setting Bit 1 of Configuration Register 3 (0x78).
THERM as an Input
When THERM is configured as an input, the ADT7473/
ADT7473-1 can time assertions on the THERM pin. This can be
useful for connecting to the PROCHOT output of a CPU to
gauge system performance. See the THERM Timer section for
more information.
The user can also set up the ADT7473/ADT7473-1 so that,
when the THERM pin is driven low externally, the fans run at
100%. The fans run at 100% for the duration of the time the
THERM pin is pulled low. This is done by setting the BOOST
bit (Bit 2) in Configuration Register 3 (0x78) to 1. This works
only if the fan is already running, for example, in manual mode
when the current duty cycle is above 0x00, or in automatic
mode when the temperature is above TMIN. If the temperature is
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