參數(shù)資料
型號(hào): ADT7473ARQZ-1REEL7
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2.50Cel, RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, MO-137AB, QSOP-16
文件頁(yè)數(shù): 10/72頁(yè)
文件大小: 1494K
代理商: ADT7473ARQZ-1REEL7
ADT7473/ADT7473-1
Rev. C | Page 18 of 72
To reduce the error due to variations in both substrate and
discrete transistors, a number of factors should be taken into
consideration:
The ideality factor, nf, of the transistor is a measure of the
deviation of the thermal diode from ideal behavior. The
ADT7473/ADT7473-1 is trimmed for an nf value of 1.008.
Use the following equation to calculate the error intro-
duced at a temperature, T(°C), when using a transistor
whose nf does not equal 1.008. Refer to the data sheet for
the related CPU to obtain the nf values.
ΔT = (nf 1.008)/1.008 × (273.15 K + T)
To factor this in, the user can write the ΔT value to the
offset register. Then, the ADT7473/ADT7473-1 auto-
matically adds it to or subtracts it from the temperature
measurement.
Some CPU manufacturers specify the high and low current
levels of the substrate transistors. The high current level of
the ADT7473/ADT7473-1, IHIGH, is 96 μA and the low level
current, ILOW, is 6 μA. If the ADT7473/ADT7473-1 current
levels do not match the current levels specified by the CPU
manufacturer, it might be necessary to remove an offset.
The CPU’s data sheet advises whether this offset needs to
be removed and how to calculate it. This offset can be
programmed to the offset register. It is important to note
that, if more than one offset must be considered, the
algebraic sum of these offsets must be programmed to the
offset register.
If a discrete transistor is used with the ADT7473/ADT7473-1,
the best accuracy is obtained by choosing devices according to
the following criteria:
Base-emitter voltage greater than 0.25 V at 6 μA, at the
highest operating temperature
Base-emitter voltage less than 0.95 V at 100 μA, at the
lowest operating temperature
Small variation in hFE (such as 50 to 150) that indicates
tight control of VBE characteristics
Transistors, such as 2N3904, 2N3906, or equivalents in SOT-23
packages, are suitable devices to use.
Nulling Out Temperature Errors
As CPUs run faster, it becomes more difficult to avoid high
frequency clocks when routing the D+/D– traces around a
system board. Even when recommended layout guidelines are
followed, some temperature errors can still be attributable to
noise coupled onto the D+/D– lines. Constant high frequency
noise usually attenuates or increases temperature measurements
by a linear, constant value.
The ADT7473/ADT7473-1 has temperature offset registers at
Register 0x70 and Register 0x72 for the Remote 1 and Remote 2
temperature channels. By performing a one-time calibration of
the system, the user can determine the offset caused by system
board noise and null it out using the offset registers. The offset
registers automatically add a twos complement, 8-bit reading to
every temperature measurement. The LSBs add +0.5°C offset to
the temperature reading so the 8-bit register effectively allows
temperature offsets of up to ±64°C with a resolution of +0.5°C.
This ensures that the readings in the temperature measurement
registers are as accurate as possible.
Temperature Offset Registers
Register 0x70, Remote 1 Temperature Offset = 0x00 (0°C default)
Register 0x71, Local Temperature Offset = 0x00 (0°C default)
Register 0x72, Remote 2 Temperature Offset = 0x00 (0°C default)
ADT7460/ADT7473/ADT7473-1 Backwards-Compatible
Mode
By setting Bit 1 of Configuration Register 5 (0x7C), all tempera-
ture measurements are stored in the zone temperature value
registers (Register 0x25, Register 0x26, and Register 0x27) in
twos complement, in the range 63°C to +127°C. (The
ADT7473/ADT7473-1 still makes calculations based on the
Offset 64 extended range and clamps the results, if necessary.)
The temperature limits must be reprogrammed in twos
complement. If a twos complement temperature below 63°C is
entered, the temperature is clamped to 63°C. In this mode, the
diode fault condition remains 128°C = 1000 0000, while in the
extended temperature range (64°C to +191°C), the fault condi-
tion is represented by 64°C = 0000 0000.
Temperature Measurement Registers
Register 0x25, Remote 1 Temperature
Register 0x26, Local Temperature
Register 0x27, Remote 2 Temperature
Register 0x77, Extended Resolution 2 = 0x00 default
Bits [7:6] TDM2, Remote 2 Temperature LSBs
Bits [5:4] LTMP, Local Temperature LSBs
Bits [3:2] TDM1, Remote 1 Temperature LSBs
Temperature Measurement Limit Registers
Associated with each temperature measurement channel are
high and low limit registers. Exceeding the programmed high or
low limit causes the appropriate status bit to be set. Exceeding
either limit can also generate SMBALERT interrupts.
Register 0x4E, Remote 1 Temperature Low Limit = 0x01 default
Register 0x4F, Remote 1 Temperature High Limit = 0x7F default
Register 0x50, Local Temperature Low Limit = 0x01 default
Register 0x51, Local Temperature High Limit = 0x7F default
Register 0x52, Remote 2 Temperature Low Limit = 0x01 default
Register 0x53, Remote 2 Temperature High Limit = 0x7F default
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