參數(shù)資料
型號： ADS62P43IRGCTG4
廠商： Texas Instruments
文件頁數(shù)： 5/78頁
文件大小： 0K
描述： IC ADC 14BIT SRL/PAR 80M 64VQFN
產(chǎn)品培訓模塊： Data Converter Basics
標準包裝： 250
位數(shù)： 14
采樣率（每秒）： 80M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤
供應商設備封裝： 64-VQFN 裸露焊盤（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個差分，單極
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
DEVICE CONFIGURATION
ADS62P4X can be configured independently using either parallel interface control or serial interface
programming.
USING PARALLEL INTERFACE CONTROL ONLY
To control the device using the parallel interface, keep RESET tied to high (AVDD). Pins SEN, SCLK, CTRL1,
CTRL2 and CTRL3 can be used to directly control certain modes of the ADC. After power-up, the device will
automatically get configured as per the parallel pin voltage settings (Table 4 to Table 6).
In this mode, SEN and SCLK function as parallel analog control pins, which can be configured using a simple
resistor divider (Figure 5, using resistors
<= 10% tolerance
). Table 3 has a brief description of the modes
controlled by the parallel pins. SDATA has no parallel function and can be kept low.
Table 3. Parallel Pin Definition
PIN
TYPE OF PIN
CONTROLS MODES
SCLK
Analog control pins
Coarse Gain and internal/external reference
(controlled by analog
SEN
LVDS/CMOS interface and output data format
voltage levels, see )
CTRL1
Digital control pins
CTRL2
(controlled by digital
Together control various powerdown modes and MUX mode.
logic levels)
CTRL3
USING SERIAL INTERFACE PROGRAMMING ONLY
To program the device using the serial interface, keep RESET low. Pins SEN, SDATA, and SCLK function as
serial interface digital pins and are used to access the internal registers of ADC. The registers must first be reset
to their default values either by applying a pulse on RESET pin or by setting bit
<RST> = 1. After reset, the
RESET pin must be kept low.
The serial interface section describes the register programming and register reset in more detail. Since the
parallel pins (CTRL1, CTRL2, CTRL3) are not used in this mode, they must be tied to ground.
USING BOTH SERIAL INTERFACE and PARALLEL CONTROLS
For increased flexibility, a combination of serial interface registers and parallel pin controls (CTRL1 to CTRL3)
can also be used to configure the device. To allow this, keep RESET low.
The parallel interface control pins CTRL1 to CTRL3 are available. After power-up, the device will automatically
get configured as per the voltage settings on these pins (Table 6).
SEN, SDATA, and SCLK function as serial interface digital pins and are used to access the internal registers of
ADC. The registers must first be reset to their default values either by applying a pulse on RESET pin or by
setting bit
<RST> = 1. After reset, the RESET pin must be kept low. The serial interface section describes the
register programming and register reset in more detail.
Since the power down modes can be controlled using both the parallel pins and serial registers, the priority
between the two is determined by
<OVRD> bit. When <OVRD> bit = 0, pins CTRL1 to CTRL3 control the power
down modes. With
<OVRD> = 1, register bits <POWER DOWN> control these modes, over-riding the pin
settings.
Copyright
2007–2012, Texas Instruments Incorporated
13
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