參數(shù)資料
型號： ADS62P43IRGCTG4
廠商： Texas Instruments
文件頁數(shù)： 25/78頁
文件大?。?/td> 0K
描述： IC ADC 14BIT SRL/PAR 80M 64VQFN
產(chǎn)品培訓模塊： Data Converter Basics
標準包裝： 250
位數(shù)： 14
采樣率（每秒）： 80M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-VQFN 裸露焊盤（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個差分，單極
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
Pin Assignments (LVDS INTERFACE) (continued)
PIN
NUMBER OF
PIN NAME
DESCRIPTION
NUMBER
PINS
RESET
Serial interface RESET input.
12
1
In serial interface mode, the user must initialize internal registers through hardware
RESET by applying a high-going pulse on this pin or by using software reset (refer to
Serial Interface section).
In parallel interface mode, the user has to tie RESET pin permanently high. (SCLK,
SDATA and SEN are used as parallel pin controls in this mode) The pin has an internal
100-k
pull-down resistor.
SCLK
This pin functions as serial interface clock input when RESET is low.
13
1
It functions as analog control pin when RESET is tied high and controls coarse gain
and internal/external reference selection. See Table 4 for details.
The pin has an internal pull-down resistor to ground.
SDATA
This pin functions as serial interface data input when RESET is low. The pin has an
14
1
internal pull-down resistor to ground.
SEN
This pin functions as serial interface enable input when RESET is low.
15
1
It functions as analog control pin when RESET is tied high and controls the output
interface (LVDS/CMOS) and data format selection. See Table 5 for details.
The pin has an internal pull-up resistor to AVDD.
CTRL1
These are digital logic input pins. Together they control various power down and
35
1
multiplexed mode. See Table 6 for details.
CTRL2
36
1
CTRL3
37
1
DA0P
Channel A Differential output data D0 and D1 multiplexed, true
41
1
DA0M
Channel A Differential output data D0 and D1 multiplexed, complement
40
1
DA2P
Channel A Differential output data D2 and D3 multiplexed, true
43
1
DA2M
Channel A Differential output data D2 and D3 multiplexed, complement
42
1
DA4P
Channel A Differential output data D4 and D5 multiplexed, true
45
1
DA4M
Channel A Differential output data D4 and D5 multiplexed, complement
44
1
DA6P
Channel A Differential output data D6 and D7 multiplexed, true
47
1
DA6M
Channel A Differential output data D6 and D7 multiplexed, complement
46
1
DA8P
Channel A Differential output data D8 and D9 multiplexed, true
51
1
DA8M
Channel A Differential output data D8 and D9 multiplexed, complement
50
1
DA10P
Channel A Differential output data D10 and D11 multiplexed, true
53
1
DA10M
Channel A Differential output data D10 and D11 multiplexed, complement
52
1
DA12P
Channel A Differential output data D12 and D13 multiplexed, true
55
1
DA12M
Channel A Differential output data D12 and D13 multiplexed, complement
54
1
CLKOUTP
Differential output clock, true
57
1
CLKOUTM
Differential output clock, complement
56
1
DB0P
Channel B Differential output data D0 and D1 multiplexed, true
61
1
DB0M
Channel B Differential output data D0 and D1 multiplexed, complement
60
1
DB2P
Channel B Differential output data D2 and D3 multiplexed, true
63
1
DB2M
Channel B Differential output data D2 and D3 multiplexed, complement
62
1
DB4P
Channel B Differential output data D4 and D5 multiplexed, true
3
1
DB4M
Channel B Differential output data D4 and D5 multiplexed, complement
2
1
DB6P
Channel B Differential output data D6 and D7 multiplexed, true
5
1
DB6M
Channel B Differential output data D6 and D7 multiplexed, complement
4
1
DB8P
Channel B Differential output data D8 and D9 multiplexed, true
7
1
DB8M
Channel B Differential output data D8 and D9 multiplexed, complement
6
1
DB10P
Channel B Differential output data D10 and D11 multiplexed, true
9
1
DB10M
Channel B Differential output data D10 and D11 multiplexed, complement
8
1
DB12P
Channel B Differential output data D12 and D13 multiplexed, true
11
1
DB12M
Channel B Differential output data D12 and D13 multiplexed, complement
10
1
Copyright
2007–2012, Texas Instruments Incorporated
31
相關(guān)PDF資料
PDF描述
MS27484T10F35S CONN PLUG 13POS STRAIGHT W/SCKT
D38999/20WF32AN CONN HSG RCPT 32POS WALL MT PINS
MS27467T25B35SLC CONN HSG PLUG 128POS STRGHT SCKT
MS27466T11F4PA CONN RCPT 4POS WALL MT W/PINS
E3FDAU CONN RCPT 3POS FMAL GOLD SLD FO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS62P43RGC 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs
ADS62P44 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P44EVM 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS62P44 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
ADS62P44IRGC25 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 14B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS62P44IRGCR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 14B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*