fS Sampling Frequency MSPS 0 10 20 30 40 50 60 0 25 50 75 100 125 DR V D Curre" />
參數(shù)資料
型號(hào): ADS62P43IRGCTG4
廠商: Texas Instruments
文件頁(yè)數(shù): 41/78頁(yè)
文件大小: 0K
描述: IC ADC 14BIT SRL/PAR 80M 64VQFN
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 250
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 64-VQFN 裸露焊盤(pán)(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,單極
fS Sampling Frequency MSPS
0
10
20
30
40
50
60
0
25
50
75
100
125
DR
V
D
Current
mA
G079
1.8 V, 5 pF
3.3 V, 5 pF
3.3 V, 10 pF
3.3 V, No Load
1.8 V, No Load
1.8 V, 10 pF
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
TYPICAL CHARACTERISTICS
– LOW SAMPLING FREQUENCIES (continued)
All plots are at 25
°C, AVDD = DRVDD = 3.3 V, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty
cycle,
–1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
DRVDD current (CMOS)
vs
SAMPLING FREQUENCY
across load capacitance at 2 MHz input frequency
Figure 81.
46
Copyright
2007–2012, Texas Instruments Incorporated
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