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參數(shù)資料
| 型號： | ADS1259IPW |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 6/48頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 14KSPS LN 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Industrial Automation Overview |
| 標(biāo)準(zhǔn)包裝： | 70 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 14k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個差分，單極；1 個差分，雙極 |
| 其它名稱： | 296-27184-5 |
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f
MOD/2
FLAG
1.05V
REF
AINN
AINP
J
Q
IABSI
K
DataRead
Reset
AINP
AINN(%V
)
-
R
EF
FLAG
Bit
+105
-105
0
(Conversions)
0
1
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
MODULATOR OVERLOAD BEHAVIOR
ADS1259 recovers as normal. Note that the linear
input range is
±100mV beyond the analog supply
The ADS1259 modulator is inherently stable and
voltages; with input levels greater than this range,
therefore has predictable recovery behavior resulting
use care to limit the input current to 100mA peak
from an input overdrive condition. The modulator
transient (10mA continuous).
does not exhibit the self-resetting behavior of other
modulator types, which often results in unstable
INPUT OUT-OF-RANGE DETECTION (FLAG)
output conversion results when overdriven.
The ADS1259 has a fast-responding out-of-range
The ADS1259 modulator outputs a 1s density data
circuit that triggers when the differential input exceeds
stream at 90% duty cycle with the positive full-scale
+105%
or
–105%
of
FSR
(
±1.05
VREF). The
input signal applied (10% duty cycle with the negative
out-of-range
circuit
latches
the
result
of
the
full-scale signal). If the input is overdriven past 90%
comparator output and appends the result as either
modulation, but below 100% modulation (10% and
the LSB of conversion data or as bit 7 of the data
0%
for
negative
overdrive,
respectively),
the
checksum byte. After the conversion data are read, or
modulator remains stable and continues to output the
after a new conversion is started, the comparator
1s density data stream. The digital filter may or may
not clip the output codes to +FS or
–FS, depending
detection block diagram and the detection operation,
on the duration of the overdrive. When the input is
respectively. See the Data Checksum Byte and FLAG
returned to the normal range from a long duration
Bit section for more detail.
overdrive
(worst
case),
the
modulator
returns
immediately to the normal range, but the group delay
of the digital filter delays the return of the conversion
result to within the linear range (one reading for the
sinc1 filter and two readings for completely settled
data).
If the inputs are sufficiently overdriven to drive the
modulator to full duty cycle (that is, all 1s or all 0s),
the modulator enters a stable saturated state. The
Figure 34. Input Out-Of-Range Detect Block
digital output code may clip to +FS or
–FS, again
Diagram
depending on the duration. A small duration overdrive
may not always clip the output code. When the input
returns to the normal range, the modulator requires
up to 12 modulator clock cycles (fMOD) to exit
saturation and return to the linear region. The digital
filter requires two additional conversions (sinc1, more
for sinc2) for fully settled data.
In the extreme case of over-range, either input is
overdriven
exceeding
that
either
analog
supply
voltage plus an internal ESD diode drop. The internal
ESD diodes begin to conduct and the signal on the
input is clipped. If the differential input signal range is
Figure 35. Input Out-Of-Range Detect Operation
not exceeded, the modulator remains in linear
operation. If the differential input signal range is
exceeded, the modulator is saturated but stable, and
outputs all 1s or 0s. When the input overdrive is
removed, the diodes recovery quickly and the
14
Copyright
2009–2011, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1259IPW | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) IC |
| ADS1259IPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1259QPWRQ1 | 功能描述:24 Bit Analog to Digital Converter 1 Input 1 Sigma-Delta 20-TSSOP 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 位數(shù):24 采樣率（每秒）:14k 輸入數(shù):1 輸入類型:差分，單端 數(shù)據(jù)接口:SPI 配置:ADC 無線電 - S/H:ADC:- A/D 轉(zhuǎn)換器數(shù):1 架構(gòu):三角積分 參考類型:外部 電壓 - 電源，模擬:5V 電壓 - 電源，數(shù)字:2.7 V ~ 5.25 V 特性:PGA 工作溫度:-40°C ~ 105°C 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:20-TSSOP 標(biāo)準(zhǔn)包裝:1 |
| ADS-125MC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| ADS-126 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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