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參數(shù)資料
| 型號： | ADS1259IPW |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 18/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT 14KSPS LN 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Industrial Automation Overview |
| 標(biāo)準(zhǔn)包裝： | 70 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 14k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個差分，單極；1 個差分，雙極 |
| 其它名稱： | 296-27184-5 |
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OffsetDrift=
V
-
OFFMAX
OFFMIN
TempRange
GainDrift=
GainError
Gain
-
MAX
MIN
Error
TempRange
DRDY
V
=AINP -
IN
AINN
DOUT
OldV
Data
IN
Settled
Data
FullySettled
NewV
Data
IN
Mixof
OldandNew
V
Data
IN
OldVIN
NewV
IN
t
SET
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
Settling Time While Continuously Converting
OFFSET AND GAIN
If there is a step change on the input signal while
The ADS1259 features low offset (40
μV, typ) and low
continuously converting, the next data represent a
gain errors (0.05%, typ). The offset and gain errors
combination of the previous and current input signal
can be corrected by sending calibration commands to
and should therefore be discarded; see Figure 54 for
the ADS1259; see the Calibration section.
this step change. Table 10 shows the number of
The ADS1259 also features very low offset drift
conversion cycles for completely settled data while
(0.05
μV/°C, typ) and very low gain drift (0.5ppm/°C,
continuously converting.
typ). The offset and gain drift are calculated using the
box method, as described by Equation 6 and
Table 10. Settling Time While Continuously
Converting DRDY Periods(1)
SETTLING TIME (tSET) (Conversions)
DATA RATE
(SPS)
sinc1
sinc2
(6)
10
2
3
16.6
2
3
50
2
3
60
2
3
where:
400
2
3
VOFFMAX, VOFFMIN, GainErrorMAX, and GainErrorMIN
1200
2
3
are the maximum and minimum offset and gain
error readings recorded over the Temp Range
3600
3
4
(
–40°C to +105°C)
(7)
14,400
6
7
(1) Settling time is defined as the number of DRDY periods after
the input signal has settled following an input step change.
For best data throughput in multiplexed applications, issue a
START condition (START pin or Start command) after the
input has settled following a multiplexer change; see the
Setling Time Using START section.
Figure 54. Step Change on VIN while Continuously Converting
Copyright
2009–2011, Texas Instruments Incorporated
25
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1259IPW | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) IC |
| ADS1259IPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1259QPWRQ1 | 功能描述:24 Bit Analog to Digital Converter 1 Input 1 Sigma-Delta 20-TSSOP 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 位數(shù):24 采樣率（每秒）:14k 輸入數(shù):1 輸入類型:差分，單端 數(shù)據(jù)接口:SPI 配置:ADC 無線電 - S/H:ADC:- A/D 轉(zhuǎn)換器數(shù):1 架構(gòu):三角積分 參考類型:外部 電壓 - 電源，模擬:5V 電壓 - 電源，數(shù)字:2.7 V ~ 5.25 V 特性:PGA 工作溫度:-40°C ~ 105°C 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:20-TSSOP 標(biāo)準(zhǔn)包裝:1 |
| ADS-125MC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| ADS-126 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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