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參數(shù)資料
| 型號： | ADN2850BCPZ25-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/28頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL RHEO DL 25K 9BIT16LFCSP |
| 產(chǎn)品變化通告： | Metal Edit Change 03/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 接片： | 1024 |
| 電阻（歐姆）： | 25k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 3 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP |
| 包裝： | 帶卷 (TR) |
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Data Sheet
ADN2850
Rev. E | Page 21 of 28
APPLICATIONS INFORMATION
GAIN CONTROL COMPENSATION
A digital resistor is commonly used in gain control such as the
noninverting gain amplifier shown in Figure 34.
U1
VO
R2
250k
VI
R1
47k
C1
11pF
W
B
C2
2.2pF
0
2
6
0
-0
4
7
Figure 34. Typical Noninverting Gain Amplifier
When the RDAC B terminal parasitic capacitance is connected
to the op amp noninverting node, it introduces a zero for the 1/βO
term with 20 dB/dec, whereas a typical op amp gain bandwidth
product (GBP) has 20 dB/dec characteristics. A large R2 and
finite C1 can cause the frequency of this zero to fall well below
the crossover frequency. Therefore, the rate of closure becomes
40 dB/dec, and the system has a 0° phase margin at the crossover
frequency. If an input is a rectangular pulse or step function, the
output can ring or oscillate. Similarly, it is also likely to ring when
switching between two gain values; this is equivalent to a stop
change at the input.
Depending on the op amp GBP, reducing the feedback resistor
might extend the frequency of the zero far enough to overcome
the problem. A better approach is to include a compensation
capacitor, C2, to cancel the effect caused by C1. Optimum
compensation occurs when R1 × C1 = R2 × C2. This is not
an option because of the variation of R2. As a result, one can
use the previous relationship and scale C2 as if R2 were at its
maximum value. Doing this might overcompensate and
compromise the performance when R2 is set at low values.
Alternatively, it avoids the ringing or oscillation at the worst
case. For critical applications, find C2 empirically to suit the
oscillation. In general, C2 in the range of a few picofarads to no
more than a few tenths of picofarads is usually adequate for the
compensation.
Similarly, W and A terminal capacitances are connected to the
output (not shown); their effect at this node is less significant
and the compensation can be avoided in most cases.
PROGRAMMABLE LOW-PASS FILTER
In analog-to-digital conversions (ADCs), it is common to
include an antialiasing filter to band limit the sampling signal.
Therefore, the dual-channel ADN2850 can be used to construct
a second-order Sallen-Key low-pass filter, as shown in Figure 35.
B
VI
AD8601
+2.5V
VO
ADJUSTED
CONCURRENTLY
–2.5V
V+
V–
W
R
R2
R1
B
W
R
C1
C2
U1
0
2
6
0
-0
5
Figure 35. Sallen-Key Low-Pass Filter
The design equations are
2
f
I
O
S
Q
S
V
ω
+
ω
+
ω
=
(10)
C2
C1
R2
R1
O
1
=
ω
(11)
Q =
C2
R2
1
C1
R1
+
1
(12)
First, users should select convenient values for the capacitors.
To achieve maximally flat bandwidth, where Q = 0.707, let C1
be twice the size of C2 and let R1 equal R2. As a result, the user
can adjust R1 and R2 concurrently to the same setting to
achieve the desirable bandwidth.
PROGRAMMABLE OSCILLATOR
In a classic Wien bridge oscillator, the Wien network (R||C, R'C')
provides positive feedback, whereas R1 and R2 provide negative
feedback (see Figure 36).
D1
D2
OP1177
V+
V–
+2.5V
+
–
–2.5V
VO
U1
R2A
2.1k
R2B
10k
B
A
W
R1
1k
AMPLITUDE
ADJUSTMENT
R = R' = ADN2850
R2B = AD5231
D1 = D2 = 1N4148
R'
25k
A
B
W
C'
VP
R
25k
B
W
C
2.2nF
FREQUENCY
ADJUSTMENT
2.2nF
0
2
6
0
-0
5
6
Figure 36. Programmable Oscillator with Amplitude Control
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