參數(shù)資料
型號(hào)： ADN4604ASVZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/40頁(yè)
文件大?。?/td> 0K
描述： IC CROSSPOINT SWIT 16X16 100TQFP
標(biāo)準(zhǔn)包裝： 1,000
系列： XStream™
功能： 交叉點(diǎn)開關(guān)
電路： 1 x 16:16
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 3.6 V
電流 - 電源： 95mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 帶卷 (TR)
4.25 Gbps,
16 × 16, Digital Crosspoint Switch
Data Sheet
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2009–2013 Analog Devices, Inc. All rights reserved.
FEATURES
DC to 4.25 Gbps per port NRZ data rate
Programmable receive equalization
12 dB boost at 2 GHz
Compensates 40 inches of FR4 at 4.25 Gbps
Programmable transmit preemphasis/deemphasis
Up to 12 dB boost at 4.25 Gbps
Compensates 40 inches of FR4 at 4.25 Gbps
Low power: 130 mW per channel at 3.3 V (outputs enabled)
16 × 16, fully differential, nonblocking array
Double rank connection programming with dual
connection maps
Low jitter, typically 20 ps
Flexible I/O supply range
DC- or ac-coupled differential CML inputs
Programmable CML output levels
Per-lane input P/N pair inversion for routing ease
50 Ω on-chip I/O termination
Supports 8b/10b, scrambled or uncoded NRZ data
Serial (I2C slave or SPI) control interface
100-lead TQFP, Pb-free package
APPLICATIONS
Fiber optic network switching
High speed serial backplane routing to OC-48 with FEC
XAUI: 10GBASE-KX4
Gigabit Ethernet over backplane: 1000BASE-KX
1×, 2×, and 4× Fibre Channel
InfiniBand
Digital video (HDMI, DVI, DisplayPort, 3G-/HD-/SD-SDI)
Data storage networks
FUNCTIONAL BLOCK DIAGRAM
EQ
RX
TX
PRE-
EMPHASIS
16 × 16
SWITCH
MATRIX
CONNECTION
MAP 0
CONNECTION
MAP 1
SERIAL
INTERFACE
CONTROL
LOGIC
PER-PORT
OUTPUT
LEVEL
SETTINGS
OUTPUT
LEVEL
HOOKUP
TABLE
ADN4604
VCC
VEE
DVCC
OP[15:0]
VTTON,
VTTOS
ON[15:0]
IP[15:0]
VTTIE,
VTTIW
IN[15:0]
I2C/SPI
ADDR1/SDI
SDA/SDO
SCL/SCK
RESET
UPDATE
ADDR0/CS
07934-
001
Figure 1.
GENERAL DESCRIPTION
The ADN4604 is a 16 × 16 asynchronous, protocol agnostic,
digital crosspoint switch, with 16 differential PECL-/CML-
compatible inputs and 16 differential CML outputs.
The ADN4604 is optimized for nonreturn-to-zero (NRZ) sig-
naling with data rates of up to 4.25 Gbps per port. Each port
offers a fixed level of input equalization and programmable
output swing and output preemphasis.
The ADN4604 nonblocking switch core implements a 16 × 16
crossbar and supports independent channel switching through
the serial control interface. The ADN4604 has low latency and
very low channel-to-channel skew.
An I2C or SPI interface is used to control the device and pro-
vide access to advanced features, such as additional levels of
preemphasis and output disable.
The ADN4604 is packaged in a 100-lead TQFP package and
operates from 40°C to +85°C.
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