參數(shù)資料
型號: ADM1027ARQZ-RL7
廠商: ON Semiconductor
文件頁數(shù): 46/56頁
文件大?。?/td> 1822K
描述: IC REMOTE THERMAL CTLR 24QSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
Product Discontinuation Notice 25/Aug/2008
Product Obsolescence 30/Sept/2009
標準包裝: 1,000
系列: dBCool®
功能: 風扇控制,溫度監(jiān)控器
傳感器類型: 內(nèi)部和外部
感應(yīng)溫度: 0°C ~ 105°C,外部傳感器
精確度: ±1°C
拓撲: ADC,比較器,風扇速度計數(shù)器,多路復(fù)用器,寄存器庫
輸出類型: SMBus?
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: 0°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
REV. A
46
ADM1027
Table XV. Fan Tachometer Limit Registers
Register Address
R/W
Description
Power-On Default
0x54
Read/Write
TACH 1 Minimum Low Byte
0xFF
0x55
Read/Write
TACH 1 Minimum High Byte
0xFF
0x56
Read/Write
TACH 2 Minimum Low Byte
0xFF
0x57
Read/Write
TACH 2 Minimum High Byte
0xFF
0x58
Read/Write
TACH 3 Minimum Low Byte
0xFF
0x59
Read/Write
TACH 3 Minimum High Byte
0xFF
0x5A
Read/Write
TACH 4 Minimum Low Byte
0xFF
0x5B
Read/Write
TACH 4 Minimum High Byte
0xFF
Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit
will be set in Interrupt Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 lock bit has no effect on
these registers.
Table XVI. PWM Configuration Registers
Register Address
R/W
Description
Power-On Default
0x5C
Read/Write
PWM1 Configuration
0x62
0x5D
Read/Write
PWM2 Configuration
0x62
0x5E
Read/Write
PWM3 Configuration
0x62
Bit
Name
Read/Write
Description
<2:0>
SPIN
Read/Write
These bits control the startup timeout for PWMx. The PWM output stays high until two
(Fan Startup
valid TACH rising edges are seen from the fan. If there is not a valid TACH signal during
Timeout)
the fan TACH measurement directly after the fan startup timeout period, then the TACH
measurement will read 0xFFFF and Status Register 2 will reflect the fan fault. If the
TACH minimum high and low byte contains 0xFFFF or 0x0000, then the Status Register
2 bit will not be set, even if the fan has not started.
000 = No startup timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
Note: Do not program 100.
<3>
Reserved   Read-Only
Reserved for future use.
<4>
INV
Read/Write
This bit inverts the PWM output. The default is 0, which corresponds to a logic high
output for 100% duty cycle. Setting this bit to 1, inverts the PWM output, so 100% duty
cycle corresponds to a logic low output.
<7:5>
BHVR
Read/Write
These bits assign each fan to a particular temperature sensor for localized cooling.
000 = Remote 1 temperature controls PWMx (automatic fan control mode).
001 = Local temperature controls PWMx (automatic fan control mode).
010 = Remote 2 temperature controls PWMx (automatic fan control mode).
011 = PWMx runs full speed (default).
100 = PWMx disabled.
101 = Fastest speed calculated by local and Remote 2 temperature controls PWMx.
110 = Fastest speed calculated by all three temperatures controls PWMx.
111 = Manual mode. PWM duty cycle registers (Reg. 0x30 to 0x32) become writable.
These registers become read-only when the configuration register 1 lock bit is set to 1. Any subsequent attempts to write to these
registers will fail.
Rev. 3 | Page 46 of 56 | www.onsemi.com
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