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參數(shù)資料
| 型號： | ADM1027ARQZ-RL7 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 18/56頁 |
| 文件大?。?/td> | 1822K |
| 描述： | IC REMOTE THERMAL CTLR 24QSOP |
| 產(chǎn)品變化通告： | MFG CHG Notification ADI to ON Semi Product Discontinuation Notice 25/Aug/2008 Product Obsolescence 30/Sept/2009 |
| 標準包裝： | 1,000 |
| 系列： | dBCool® |
| 功能： | 風扇控制，溫度監(jiān)控器 |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應溫度： | 0°C ~ 105°C，外部傳感器 |
| 精確度： | ±1°C |
| 拓撲： | ADC，比較器，風扇速度計數(shù)器，多路復用器，寄存器庫 |
| 輸出類型： | SMBus? |
| 輸出警報： | 無 |
| 輸出風扇： | 是 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應商設(shè)備封裝： | 24-QSOP |
| 包裝： | 帶卷 (TR) |
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REV. A
18
ADM1027
ANALOG MONITORING CYCLE TIME
The analog monitoring cycle begins when a 1 is written to the
start bit (Bit 0) of Configuration Register 1(Reg. 0x40). The
ADC measures each analog input in turn and as each mea-
surement is completed, the result is automatically stored in the
appropriate value register. This round-robin monitoring cycle
continues unless disabled by writing a 0 to Bit 0 of Configura-
tion Register 1.
Since the ADC will normally be left to free-run in this manner,
the time taken to monitor all the analog inputs will normally not
be of interest as the most recently measured value of any input
can be read out at any time.
For applications where the monitoring cycle time is important,
it can easily be calculated.
The total number of channels measured is
y Four dedicated supply voltage inputs
y 3.3 V
STBY
or 5 V supply (V
CC
pin)
y Local temperature
y Two remote temperatures
As mentioned previously, the ADC performs round-robin con-
versions and takes 11.38 ms for each voltage measurement,
12 ms for a local temperature reading, and 25.5 ms for a remote
temperature reading.
The total monitoring cycle time for averaged voltage and tem-
perature monitoring is therefore nominally
(5 11.38) + 12 + (2 25.5) = 120 ms
Fan TACH measurements are made in parallel and are not
synchronized with the analog measurements in any way.
STATUS REGISTERS
The results of limit comparisons are stored in Status Registers 1
and 2. The status register bit for each channel reflects the status of
the last measurement and limit comparison on that channel.
If a measurement is within limits, the corresponding status
register bit will be cleared to 0. If the measurement is out-of-limits,
the corresponding status register bit will be set to 1.
The state of the various measurement channels may be polled by
reading the status registers over the serial bus. When 1, Bit 7
(OOL) of Status Register 1 (Reg. 0x41) means that an out-of-
limit event has been flagged in Status Register 2. This means that
the user need read only Status Register 2 when this bit is set.
Alternatively, Pin 10 can be configured as an SMBALERT output.
This will automatically notify the system supervisor of an
out-of-limit condition. Reading the status registers clears the
appropriate status bit as long as the error condition that caused
the interrupt has cleared. Status register bits are sticky.
Whenever a status bit gets set, indicating an out-of-limit
condition, it will remain set even if the event that caused it has
gone away (until read). The only way to clear the status bit is to
read the status register after the event has gone away. Interrupt
status mask registers (Reg. 0x74, 0x75) allow individual inter-
rupt sources to be masked from causing an SMBALERT.
However, if one of these masked interrupt sources goes out-
of-limit, its associated status bit will get set in the interrupt
status registers.
STATUS REGISTER 1 (REG. 0x41)
Bit 7 (OOL) = 1, denotes a bit in Status Register 2 is set and
Status Register 2 should be read.
Bit 6 (R2T) = 1, Remote 2 temp high or low limit has been
exceeded.
Bit 5 (LT) = 1, Local temp high or low limit has been exceeded.
Bit 4 (R1T) = 1, Remote 1 temp high or low limit has been
exceeded.
Bit 3 (5 V) = 1, 5 V high or low limit has been exceeded.
Bit 2 (V
CC
) = 1, V
CC
high or low limit has been exceeded.
Bit 1 (V
CCP
) = 1, V
CCP
high or low limit has been exceeded.
Bit 0 (2.5 V) = 1, 2.5 V high or low limit has been exceeded.
STATUS REGISTER 2 (REG. 0x42)
Bit 7 (D2) = 1, indicates an open or short on D2+/D2 inputs.
Bit 6 (D1) = 1, indicates an open or short on D2+/D2 inputs.
Bit 5 (FAN4) = 1, indicates Fan 4 has dropped below mini-
mum speed.
Bit 4 (FAN3) = 1, indicates Fan 3 has dropped below mini-
mum speed.
Bit 3 (FAN2) = 1, indicates Fan 2 has dropped below mini-
mum speed.
Bit 2 (FAN1) = 1, indicates Fan 1 has dropped below mini-
mum speed.
Bit 1 (OVT) = 1, indicates that a THERM overtemperature
limit has been exceeded.
Bit 0 (12 V) = 1, 12 V high or low limit has been exceeded.
Rev. 3 | Page 18 of 56 | www.onsemi.com
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