參數(shù)資料
型號(hào)： ADM1027ARQZ-RL7
廠(chǎng)商： ON Semiconductor
文件頁(yè)數(shù)： 17/56頁(yè)
文件大?。?/td> 1822K
描述： IC REMOTE THERMAL CTLR 24QSOP
產(chǎn)品變化通告： MFG CHG Notification ADI to ON Semi
Product Discontinuation Notice 25/Aug/2008
Product Obsolescence 30/Sept/2009
標(biāo)準(zhǔn)包裝： 1,000
系列： dBCool®
功能： 風(fēng)扇控制，溫度監(jiān)控器
傳感器類(lèi)型： 內(nèi)部和外部
感應(yīng)溫度： 0°C ~ 105°C，外部傳感器
精確度： ±1°C
拓?fù)洌?/td> ADC，比較器，風(fēng)扇速度計(jì)數(shù)器，多路復(fù)用器，寄存器庫(kù)
輸出類(lèi)型： SMBus?
輸出警報(bào)： 無(wú)
輸出風(fēng)扇： 是
電源電壓： 3 V ~ 5.5 V
工作溫度： 0°C ~ 105°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 24-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 24-QSOP
包裝： 帶卷 (TR)
REV. A
ADM1027
17
SMBALERT, STATUS, AND MASK REGISTERS
SMBALERT CONFIGURATION
Pin 10 of the ADM1027 can be configured as either PWM2 or
as an SMBALERT output. The SMBALERT output may be
used to signal out-of-limit conditions as explained below. The
default state of Pin 10 is PWM2. To configure Pin 10 as
SMBALERT:
Configuration Reg. 3 (Addr = 0x78), Bit 0 = 1 = SMBALERT
Configuration Reg. 3 (Addr = 0x78), Bit 0 = 0 = PWM2 =
default
LIMIT VALUES
Associated with each measurement channel on the ADM1027
are high and low limits. These can form the basis of system
status monitoring; a status bit can be set for any out-of-limit
condition and detected by polling the device. Alternatively,
SMBALERT interrupts can be generated to flag a processor or
microcontroller of out-of-limit conditions.
8-BIT LIMITS
The following is a list of 8-bit limits on the ADM1027:
Voltage Limit Registers
Reg. 0x44 2.5 V Low Limit = 0x00 default
Reg. 0x45 2.5 V High Limit = 0xFF default
Reg. 0x46 V
CCP
 Low Limit = 0x00 default
Reg. 0x47 V
CCP
 High Limit = 0xFF default
Reg. 0x48 V
CC
 Low Limit = 0x00 default
Reg. 0x49 V
CC
 High Limit = 0xFF default
Reg. 0x4A 5 V Low Limit = 0x00 default
Reg. 0x4B 5 V High Limit = 0xFF default
Reg. 0x4C 12 V Low Limit = 0x00 default
Reg. 0x4D 12 V High Limit = 0xFF default
Temperature Limit Registers
Reg. 0x4E Remote 1 Temp Low Limit = 0x81 default
Reg. 0x4F Remote 1 Temp High Limit = 0x7F default
Reg. 0x6A Remote 1 THERM Limit = 0x64 default
Reg. 0x50 Local Temp Low Limit = 0x81 default
Reg. 0x51 Local Temp High Limit = 0x7F default
Reg. 0x6B Local THERM Limit = 0x64 default
Reg. 0x52 Remote 2 Temp Low Limit = 0x81 default
Reg. 0x53 Remote 2 Temp High Limit = 0x7F default
Reg. 0x6C Remote 2 THERM Limit = 0x64 default
16-Bit Limits
The fan TACH measurements are 16-bit results. The fan TACH
limits are also 16 bits, consisting of a high byte and low byte.
Since fans running underspeed or stalled are normally the only
conditions of interest, only high limits exist for fan TACHs.
Since fan TACH period is actually being measured, exceeding
the limit indicates a slow or stalled fan.
Fan Limit Registers
Reg. 0x54 TACH1 Minimum Low Byte = 0xFF default
Reg. 0x55 TACH1 Minimum High Byte = 0xFF default
Reg. 0x56 TACH2 Minimum Low Byte = 0xFF default
Reg. 0x57 TACH2 Minimum High Byte = 0xFF default
Reg. 0x58 TACH3 Minimum Low Byte = 0xFF default
Reg. 0x59 TACH3 Minimum High Byte = 0xFF default
Reg. 0x5A TACH4 Minimum Low Byte = 0xFF default
Reg. 0x5B TACH4 Minimum High Byte = 0xFF default
OUT-OF-LIMIT COMPARISONS
The ADM1027 will measure all parameters in round-robin format
and set the appropriate status bit for out-of-limit conditions.
Comparisons are done differently depending on whether the
measured value is being compared to a high or low limit.
HIGH LIMIT: > COMPARISON PERFORMED
LOW LIMIT: < OR = COMPARISON PERFORMED
Rev. 3 | Page 17 of 56 | www.onsemi.com
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