參數(shù)資料
型號: ADAV803ASTZ
廠商: Analog Devices Inc
文件頁數(shù): 42/60頁
文件大小: 0K
描述: IC CODEC AUDIO R-DVD 3.3V 64LQFP
標(biāo)準(zhǔn)包裝: 1
類型: 音頻編解碼器
數(shù)據(jù)接口: 串行
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 102 / 101
電壓 - 電源,模擬: 3 V ~ 3.6 V
電壓 - 電源,數(shù)字: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
配用: EVAL-ADAV803EBZ-ND - BOARD EVALUATION FOR ADAV803
ADAV803
Rev. A | Page 47 of 60
Datapath Control Register 2—Address 1100011 (0x63)
Table 94. Datapath Control Register 2 Bit Map
7
6
5
4
3
2
1
0
Reserved
DAC2
DAC1
DAC0
DIT2
DIT1
DIT0
Table 95. Datapath Control Register 2 Bit Descriptions
Bit Name
Description
DAC[2:0]
Datapath source select for DAC.
00 = ADC.
01 = DIR.
10 = Playback.
11 = Auxiliary in.
100 = SRC.
DIT[2:0]
Datapath source select for DIT.
000 = ADC.
001 = DIR.
010 = Playback.
011 = Auxiliary in.
100 = SRC.
DAC Control Register 1—Address 1100100 (0x64)
Table 96. DAC Control Register 1 Bit Map
7
6
5
4
3
2
1
0
DR_ALL
DR_DIG
CHSEL1
CHSEL0
POL1
POL0
MUTER
MUTEL
Table 97. DAC Control Register 1 Bit Descriptions
Bit Name
Description
DR_ALL
Hard reset and power-down.
0 = Normal, output pins go to VREF level.
1 = Hard reset and low power, output pins go to AGND.
DR_DIG
DAC digital reset.
0 = Normal.
1 = Reset all except registers.
CHSEL[1:0]
DAC channel select.
00 = Normal, left-right.
01 = Both right.
10 = Both left.
11 = Swapped, right-left.
POL[1:0]
DAC channel polarity.
00 = Both positive.
01 = Left negative.
10 = Right negative.
11 = Both negative.
MUTER
Mute right channel.
0 = Mute.
1 = Normal.
MUTEL
Mute left channel.
0 = Mute.
1 = Normal.
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