參數(shù)資料
型號: ADAU1781BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 1/92頁
文件大?。?/td> 0K
描述: IC SIGMADSP CODEC LN 32LFCSP
標準包裝: 1
系列: SigmaDSP®
類型: 立體聲音頻
數(shù)據(jù)接口: I²C,串行,SPI?
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標準 ADC / DAC (db): 100 / 105(差分),100 / 103(單端)
動態(tài)范圍,標準 ADC / DAC (db): 99.2 / 105(差分),99.2 / 103(單端)
電壓 - 電源,模擬: 1.8 V ~ 3.65 V
電壓 - 電源,數(shù)字: 1.63 V ~ 3.65 V
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應商設備封裝: 32-LFCSP-VQ
包裝: 托盤
Low Noise Stereo Codec with
SigmaDSP Processing Core
ADAU1781
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2009–2011 Analog Devices, Inc. All rights reserved.
FEATURES
24-bit stereo audio ADC and DAC
400 mW speaker amplifier (into 8 load)
Programmable SigmaDSP audio processing core
Wind noise detection and filtering
Enhanced stereo capture (ESC)
Dynamics processing
Equalization and filtering
Volume control and mute
Sampling rates from 8 kHz to 96 kHz
Stereo pseudo differential microphone input
Optional stereo digital microphone input pulse-density
modulation (PDM)
Stereo line output
PLL supporting a range of input clock rates
Analog and digital I/O 1.8 V to 3.3 V
Software control via SigmaStudio graphical user interface
Software-controllable, clickless mute
Software register and hardware pin standby mode
32-lead, 5 mm × 5 mm LFCSP
APPLICATIONS
Digital still cameras
Digital video cameras
GENERAL DESCRIPTION
The ADAU1781 is a low power, 24-bit stereo audio codec. The
low noise DAC and ADC support sample rates from 8 kHz to
96 kHz. Low current draw and power saving modes make the
ADAU1781 ideal for battery-powered audio applications.
A programmable SigmaDSP core provides enhanced record
and playback processing to improve overall audio quality.
The record path includes two digital stereo microphone inputs
and an analog stereo input path. The analog inputs can be
configured for either a pseudo differential or a single-ended
stereo source. A dedicated analog beep input signal can be
mixed into any output path. The ADAU1781 includes a stereo
line output and speaker driver, which makes the device capable of
supporting dynamic speakers.
The serial control bus supports the I2C or SPI protocols, and
the serial audio bus is programmable for I2S, left-justified, right-
justified, or TDM mode. A programmable PLL supports flexible
clock generation for all standard rates and available master clocks
from 11 MHz to 20 MHz.
FUNCTIONAL BLOCK DIAGRAM
PGA
LEFT
ADC
RIGHT
ADC
LEFT
DAC
RIGHT
DAC
PGA
BEEP
PDN
MICBIAS
LMIC/LMICN/
MICD1
LMICP
RMIC/RMICN/
MICD2
RMICP
AOUTL
AOUTR
SPP
SPN
PLL
SigmaDSP CORE
WIND NOISE
NOTCH FILTER
EQUALIZER
DIGITAL VOLUME
CONTROL
DYNAMIC
PROCESSING
OUTPUT
MIXER
M
CKI
REGULATOR
CM
IOV
D
DG
ND
DV
DDO
UT
AV
DD1
AG
ND1
AV
DD2
AG
ND2
SERIAL DATA
INPUT/OUTPUT PORTS
ADC_S
DAT
A/
GP
IO1
B
C
LK
/GP
IO2
LR
C
LK
/GP
IO3
DAC_S
DAT
A/
GP
IO0
I2C/SPI
CONTROL PORT
ADDR0/
CDAT
A
ADDR1/
CL
AT
CH
S
CL
/CCL
K
S
DA/
CO
UT
ADAU1781
MICROPHONE
BIAS
08314-
001
Figure 1.
相關PDF資料
PDF描述
VI-BVM-IX-B1 CONVERTER MOD DC/DC 10V 75W
MC9S12XA256VAL IC MCU 256K FLASH 112-LQFP
VI-26F-IY-F1 CONVERTER MOD DC/DC 72V 50W
VI-B24-IY-F1 CONVERTER MOD DC/DC 48V 50W
VI-B23-IY-F2 CONVERTER MOD DC/DC 24V 50W
相關代理商/技術參數(shù)
參數(shù)描述
ADAU1781BCPZ-RL 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise Stereo Codec with SigmaDSP Processing Core
ADAU1781BCPZ-RL7 功能描述:IC SIGMADSP CODEC LN 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:SigmaDSP® 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率(位):18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比,標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍,標準 ADC / DAC (db):82 / 87.5 電壓 - 電源,模擬:2.6 V ~ 3.3 V 電壓 - 電源,數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP(7x7) 包裝:帶卷 (TR)
ADAU1961 制造商:AD 制造商全稱:Analog Devices 功能描述:Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
ADAU1961WBCPZ 功能描述:IC STEREO AUD CODEC LP 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率(位):15 b ADC / DAC 數(shù)量:1 / 1 三角積分調(diào)變:是 S/N 比,標準 ADC / DAC (db):- 動態(tài)范圍,標準 ADC / DAC (db):- 電壓 - 電源,模擬:2.7 V ~ 3.3 V 電壓 - 電源,數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-VFBGA 供應商設備封裝:80-BGA MICROSTAR JUNIOR(5x5) 包裝:帶卷 (TR) 其它名稱:296-21257-2
ADAU1961WBCPZ-R7 功能描述:IC STEREO AUD CODEC LP 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率(位):18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比,標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍,標準 ADC / DAC (db):82 / 87.5 電壓 - 電源,模擬:2.6 V ~ 3.3 V 電壓 - 電源,數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP(7x7) 包裝:帶卷 (TR)