- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10978 > AD9911BCPZ (Analog Devices Inc)IC DDS 500MSPS DAC 10BIT 56LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9911BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DDS 500MSPS DAC 10BIT 56LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 500MHz |
| 調(diào)節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.71 V ~ 1.96 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 托盤 |
| 配用： | AD9911/PCBZ-ND - BOARD EVAL FOR AD9911 |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
AD9911
Rev. 0 | Page 11 of 44
Pin No.
Mnemonic
I/O
Description
6, 10, 12, 16, 28, 32
NC
N/A
No Connection. Analog Devices recommends leaving these pins floating.
40, 41, 42, 43
P0, P1, P2, P3
I
These data pins are used for modulation (FSK, PSK, ASK), start/stop for the sweep
accumulator, and ramping up/down the output amplitude. Any toggle of these data
inputs is equivalent to an I/O_UPDATE. The data is synchronous to the SYNC_CLK (Pin
54). The data inputs must meet the set-up and hold time requirements to the
SYNC_CLK. This guarantees a fixed pipeline delay of data to the DAC output;
otherwise, a ±1 SYNC_CLK period of uncertainty occurs. The functionality of these
pins is controlled by profile pin configuration (PPC) bits in Register FR1 <12:14>.
46
I/O_UPDATE
I
A rising edge triggers data transfer from the I/O port buffer to active registers.
I/O_UPDATE is synchronous to the SYNC_CLK (Pin 54). I/O_UPDATE must meet the
set-up and hold time requirements to the SYNC_CLK to guarantee a fixed pipeline
delay of data to DAC output. If not, a ±1 SYNC_CLK period of uncertainty occurs. The
minimum pulse width is one SYNC_CLK period.
47
CS
I
The active low chip select allows multiple devices to share a common I/O bus (SPI).
48
SCLK
I
Data Clock for I/O Operations. Data bits are written on the rising edge of SCLK and
read on the falling edge of SCLK.
49
DVDD_I/O
I
3.3 V Digital Power Supply for SPI Port and Digital I/O.
50
SDIO_0
I/O
Data pin SDIO_0 is dedicated to the I/O port only.
51, 52, 53
SDIO_1, SDIO_2,
SDIO_3
I/O
Data pins SDIO_1:3 can be used for the I/O port or to initiate a ramp up/ramp down
(RU/RD) of the DAC output amplitude.
54
SYNC_CLK
O
The SYNC_CLK, which runs at the system clock rate, can be disabled. I/O_UPDATE
and profile changes (Pin 40 to Pin 43) are synchronous to the SYNC_CLK. To guarantee
a fixed pipeline delay of data to DAC output, I/O_UPDATE and profile changes (Pin 40
to Pin 43) must meet the set-up and hold time requirements to the rising edge of
SYNC_CLK. If not, a ±1 SYNC_CLK period of uncertainty exists.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-B11-IY-F4 | CONVERTER MOD DC/DC 12V 50W |
| VE-B11-IY-F1 | CONVERTER MOD DC/DC 12V 50W |
| VE-2WZ-IY-F4 | CONVERTER MOD DC/DC 2V 20W |
| VE-2WZ-IY-F1 | CONVERTER MOD DC/DC 2V 20W |
| VE-2WZ-IX-F2 | CONVERTER MOD DC/DC 2V 30W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9911BCPZ-REEL7 | 功能描述:IC DDS 500MSPS DAC 10BIT 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9912 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer w/ 14-bit DAC |
| AD9912/PCBZ | 制造商:Analog Devices 功能描述:Evaluation Kit For 1 GSPS Direct Digital Synthesizer W/ 14-Bit DAC 制造商:Analog Devices 功能描述:EVAL KIT FOR 1 GSPS DIRECT DGTL SYNTHESIZER W/ 14BIT DAC - Bulk 制造商:Analog Devices 功能描述:EVALUATION BOARD AD9912 1GSPS DDS |
| AD9912A/PCBZ | 功能描述:BOARD EVALUATION FOR AD9912 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| AD9912ABCPZ | 功能描述:IC DDS 1GSPS DAC 14BIT 64LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。