參數(shù)資料
型號： AD9887AKSZ-170
廠商： Analog Devices Inc
文件頁數(shù)： 4/40頁
文件大小： 0K
描述： IC INTRFACE ANALOG/DVI 160-MQFP
標(biāo)準(zhǔn)包裝： 24
應(yīng)用： 圖形卡，VGA 接口
接口： 模擬和數(shù)字
電源電壓： 3.15 V ~ 3.45 V
封裝/外殼： 160-BQFP
供應(yīng)商設(shè)備封裝： 160-MQFP（28x28）
包裝： 托盤
安裝類型： 表面貼裝
產(chǎn)品目錄頁面： 788 (CN2011-ZH PDF)
REV. 0
–12–
AD9887
Table III. Interface Selection Controls
Analog
Digital
Active
AIO
Interface Detect
AIS
Interface
Description
1
X
0
Analog
Force the analog interface active.
1
Digital
Force the digital interface active.
0
X
None
Neither interface was detected. Both interfaces are
powered down and the SyncDT pin gets set to Logic 0.
0
1
X
Digital
The digital interface was detected. Power down the
analog interface.
1
0
X
Analog
The analog interface was detected. Power down the
digital interface.
1
0
X
Analog
Both interfaces were detected. The analog interface has
priority.
1
Digital
Both interfaces were detected. The digital interface has
priority.
Table IV. Power-Down Mode Descriptions
Inputs
Analog
Digital
Active
Power-
Interface
Mode
Down
1
Detect
2
Detect
3
Override
Select
Powered On or Comments
Soft Power-Down (Seek Mode)
1
0
X
Serial Bus, Digital Interface Clock Detect,
Analog Interface Activity Detect, SOG,
Bandgap Reference
Digital Interface On
1
0
1
0
X
Serial Bus, Digital Interface, Analog Interface
Activity Detect, SOG, Outputs, Bandgap
Reference
Analog Interface On
1
0
X
Serial Bus, Analog Interface, Digital Interface
Clock Detect, SOG, Outputs, Bandgap
Reference
Serial Bus Arbitrated Interface
1
0
Same as Analog Interface On Mode
Serial Bus Arbitrated Interface
1
0
1
Same as Digital Interface On Mode
Override to Analog Interface
1
X
1
0
Same as Analog Interface On Mode
Override to Digital Interface
1
X
1
Same as Digital Interface On Mode
Absolute Power-Down
0
X
Serial Bus
NOTES
1Power-down is controlled via bit 0 in serial bus Register 12h.
2Analog Interface Detect is determined by OR-ing Bits 7, 6, and 5 in serial bus Register 11h.
3Digital Interface Detect is determined by Bit 4 in serial bus Register 11h.
Power Management
The AD9887 is a dual interface device with shared outputs.
Only one interface can be used at a time. For this reason, the
chip automatically powers down the unused interface. When
the analog interface is being used, most of the digital interface
circuitry is powered down and vice-versa. This helps to minimize
the AD9887 total power dissipation. In addition, if neither inter-
face has activity on it, the chip powers down both interfaces.
The AD9887 uses the activity detect circuits, the active inter-
face bits in the serial registers, the active interface override bits,
and the power-down bit to determine the correct power state.
In a given power mode not all circuitry in the inactive interface
is powered down completely. When the digital interface is
active, the bandgap reference and HSYNC detect circuitry is not
powered down. When the analog interface is active, the digital
interface clock detect circuit is not powered down. Table IV
summarizes how the AD9887 determines which power mode to
be in and what circuitry is powered on/off in each of these
modes. The power-down command has priority, followed by the
active interface override, and then the automatic circuitry.
OBSOLETE
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